diff options
Diffstat (limited to 'configs/tested-cfgs/SM6_TITANX')
| -rw-r--r-- | configs/tested-cfgs/SM6_TITANX/gpgpusim.config | 7 | ||||
| -rw-r--r-- | configs/tested-cfgs/SM6_TITANX/trace.config | 4 |
2 files changed, 4 insertions, 7 deletions
diff --git a/configs/tested-cfgs/SM6_TITANX/gpgpusim.config b/configs/tested-cfgs/SM6_TITANX/gpgpusim.config index a686238..ce6f745 100644 --- a/configs/tested-cfgs/SM6_TITANX/gpgpusim.config +++ b/configs/tested-cfgs/SM6_TITANX/gpgpusim.config @@ -22,8 +22,6 @@ # SASS execution (only supported with CUDA >= 4.0) -gpgpu_ptx_convert_to_ptxplus 0 -gpgpu_ptx_save_converted_ptxplus 0 -# SASS trace-driven mode execution -#-trace_driven_mode 1 # high level architecture configuration -gpgpu_n_clusters 28 @@ -66,11 +64,6 @@ -ptx_opcode_initiation_sfu 4 -ptx_opcode_latency_sfu 20 --trace_opcode_latency_initiation_int 4,1 --trace_opcode_latency_initiation_sp 4,1 --trace_opcode_latency_initiation_dp 20,8 --trace_opcode_latency_initiation_sfu 20,4 - # in sub_core_model, schedulers are isolated, each scheduler has its own register file and EUs -gpgpu_sub_core_model 1 # enable operand collector diff --git a/configs/tested-cfgs/SM6_TITANX/trace.config b/configs/tested-cfgs/SM6_TITANX/trace.config new file mode 100644 index 0000000..88bcdc0 --- /dev/null +++ b/configs/tested-cfgs/SM6_TITANX/trace.config @@ -0,0 +1,4 @@ +-trace_opcode_latency_initiation_int 4,1 +-trace_opcode_latency_initiation_sp 4,1 +-trace_opcode_latency_initiation_dp 20,8 +-trace_opcode_latency_initiation_sfu 20,4 |