diff options
Diffstat (limited to 'configs/tested-cfgs/SM7_TITANV/gpgpusim.config')
| -rw-r--r-- | configs/tested-cfgs/SM7_TITANV/gpgpusim.config | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/configs/tested-cfgs/SM7_TITANV/gpgpusim.config b/configs/tested-cfgs/SM7_TITANV/gpgpusim.config index b5f88ce..ef28dd8 100644 --- a/configs/tested-cfgs/SM7_TITANV/gpgpusim.config +++ b/configs/tested-cfgs/SM7_TITANV/gpgpusim.config @@ -26,8 +26,6 @@ # SASS execution (only supported with CUDA >= 4.0) -gpgpu_ptx_convert_to_ptxplus 0 -gpgpu_ptx_save_converted_ptxplus 0 -# SASS trace-driven mode support -#-trace_driven_mode 1 # high level architecture configuration -gpgpu_n_clusters 40 @@ -81,12 +79,6 @@ -ptx_opcode_latency_tesnor 64 -ptx_opcode_initiation_tensor 64 --trace_opcode_latency_initiation_int 4,2 --trace_opcode_latency_initiation_sp 4,2 --trace_opcode_latency_initiation_dp 8,4 --trace_opcode_latency_initiation_sfu 20,8 --trace_opcode_latency_initiation_tensor 8,4 - # Volta has sub core model, in which each scheduler has its own register file and EUs # i.e. schedulers are isolated -gpgpu_sub_core_model 1 |