diff options
Diffstat (limited to 'configs')
| -rw-r--r-- | configs/3.x-cfgs/SM6_TITANX/gpgpusim.config | 1 | ||||
| -rw-r--r-- | configs/4.x-cfgs/SM6_TITANX/gpgpusim.config | 6 |
2 files changed, 4 insertions, 3 deletions
diff --git a/configs/3.x-cfgs/SM6_TITANX/gpgpusim.config b/configs/3.x-cfgs/SM6_TITANX/gpgpusim.config index f78bd02..28912a3 100644 --- a/configs/3.x-cfgs/SM6_TITANX/gpgpusim.config +++ b/configs/3.x-cfgs/SM6_TITANX/gpgpusim.config @@ -25,6 +25,7 @@ # shader core pipeline config -gpgpu_shader_registers 65536 +-gpgpu_occupancy_sm_number 61 # This implies a maximum of 64 warps/SM -gpgpu_shader_core_pipeline 2048:32 diff --git a/configs/4.x-cfgs/SM6_TITANX/gpgpusim.config b/configs/4.x-cfgs/SM6_TITANX/gpgpusim.config index 4c0586d..8e93723 100644 --- a/configs/4.x-cfgs/SM6_TITANX/gpgpusim.config +++ b/configs/4.x-cfgs/SM6_TITANX/gpgpusim.config @@ -65,9 +65,9 @@ # Pascal GP102 has 96KB Shared memory divided over 2 cores, each has 48KB # Pascal GP102 has 2 banks L1 cache, where each is 24KB L1 cache # The defulat is to disable the L1 cache, unless cache modifieres are used --gpgpu_cache:dl1 S:48:128:4,L:L:s:N:H,A:256:8,16:0,32 --gpgpu_cache:dl1PrefL1 S:48:128:4,L:L:s:N:H,A:256:8,16:0,32 --gpgpu_cache:dl1PrefShared S:48:128:4,L:L:s:N:H,A:256:8,16:0,32 +-gpgpu_cache:dl1 S:48:128:4,L:L:s:N:L,A:256:8,16:0,32 +-gpgpu_cache:dl1PrefL1 S:48:128:4,L:L:s:N:L,A:256:8,16:0,32 +-gpgpu_cache:dl1PrefShared S:48:128:4,L:L:s:N:L,A:256:8,16:0,32 -gpgpu_shmem_size 49152 -gpgpu_shmem_size_PrefL1 49152 -gpgpu_shmem_size_PrefShared 49152 |