diff options
Diffstat (limited to 'configs')
| -rw-r--r-- | configs/GTX480/gpgpusim.config | 15 | ||||
| -rw-r--r-- | configs/QuadroFX5600/gpgpusim.config | 8 | ||||
| -rw-r--r-- | configs/QuadroFX5800/gpgpusim.config | 10 | ||||
| -rw-r--r-- | configs/TeslaC2050/gpgpusim.config | 15 |
4 files changed, 25 insertions, 23 deletions
diff --git a/configs/GTX480/gpgpusim.config b/configs/GTX480/gpgpusim.config index b0035a5..436cb41 100644 --- a/configs/GTX480/gpgpusim.config +++ b/configs/GTX480/gpgpusim.config @@ -45,22 +45,23 @@ # In Fermi, the cache and shared memory can be configured to 16kb:48kb(default) or 48kb:16kb -# <nsets>:<bsize>:<assoc>,<rep>:<wr>:<alloc>:<wr_alloc>,<mshr>:<N>:<merge>,<mq>:**<fifo_entry> +# <nsets>:<bsize>:<assoc>,<rep>:<wr>:<alloc>:<wr_alloc>:<set_index_fn>,<mshr>:<N>:<merge>,<mq>:**<fifo_entry> # ** Optional parameter - Required when mshr_type==Texture Fifo --gpgpu_cache:dl1 32:128:4,L:L:m:N,A:32:8,8 +# Note: Hashing set index function (H) only applies to a set size of 32 or 64. +-gpgpu_cache:dl1 32:128:4,L:L:m:N:H,A:32:8,8 -gpgpu_shmem_size 49152 # The alternative configuration for fermi in case cudaFuncCachePreferL1 is selected -#-gpgpu_cache:dl1 64:128:6,L:L:m:N,A:32:8,8 +#-gpgpu_cache:dl1 64:128:6,L:L:m:N:H,A:32:8,8 #-gpgpu_shmem_size 16384 # 64 sets, each 128 bytes 8-way for each memory sub partition. This gives 786KB L2 cache --gpgpu_cache:dl2 64:128:8,L:B:m:W,A:32:4,4:0,32 +-gpgpu_cache:dl2 64:128:8,L:B:m:W:L,A:32:4,4:0,32 -gpgpu_cache:dl2_texture_only 0 --gpgpu_cache:il1 4:128:4,L:R:f:N,A:2:32,4 --gpgpu_tex_cache:l1 4:128:24,L:R:m:N,F:128:4,128:2 --gpgpu_const_cache:l1 64:64:2,L:R:f:N,A:2:32,4 +-gpgpu_cache:il1 4:128:4,L:R:f:N:L,A:2:32,4 +-gpgpu_tex_cache:l1 4:128:24,L:R:m:N:L,F:128:4,128:2 +-gpgpu_const_cache:l1 64:64:2,L:R:f:N:L,A:2:32,4 # enable operand collector -gpgpu_operand_collector_num_units_sp 6 diff --git a/configs/QuadroFX5600/gpgpusim.config b/configs/QuadroFX5600/gpgpusim.config index 775a31a..cb87b65 100644 --- a/configs/QuadroFX5600/gpgpusim.config +++ b/configs/QuadroFX5600/gpgpusim.config @@ -32,10 +32,10 @@ -ptx_opcode_initiation_dp 8,8,8,8,130 # memory stage behaviour --gpgpu_cache:il1 4:256:4,L:R:f:N,A:2:32,4 --gpgpu_tex_cache:l1 8:128:5,L:R:m:N,F:128:4,128:2 --gpgpu_const_cache:l1 64:64:2,L:R:f:N,A:2:32,4 --gpgpu_cache:dl2 16:256:8,L:B:m:W,A:16:4,4 +-gpgpu_cache:il1 4:256:4,L:R:f:N:L,A:2:32,4 +-gpgpu_tex_cache:l1 8:128:5,L:R:m:N:L,F:128:4,128:2 +-gpgpu_const_cache:l1 64:64:2,L:R:f:N:L,A:2:32,4 +-gpgpu_cache:dl2 16:256:8,L:B:m:W:L,A:16:4,4 -gpgpu_cache:dl2_texture_only 1 # TLB parameters diff --git a/configs/QuadroFX5800/gpgpusim.config b/configs/QuadroFX5800/gpgpusim.config index 0df4b64..82243c2 100644 --- a/configs/QuadroFX5800/gpgpusim.config +++ b/configs/QuadroFX5800/gpgpusim.config @@ -31,12 +31,12 @@ -ptx_opcode_initiation_dp 8,8,8,8,130 # memory stage behaviour -# <nsets>:<bsize>:<assoc>,<rep>:<wr>:<alloc>:<wr_alloc>,<mshr>:<N>:<merge>,<mq>:**<fifo_entry> +# <nsets>:<bsize>:<assoc>,<rep>:<wr>:<alloc>:<wr_alloc>:<set_index_fn>,<mshr>:<N>:<merge>,<mq>:**<fifo_entry> # ** Optional parameter - Required when mshr_type==Texture Fifo --gpgpu_cache:il1 4:256:4,L:R:f:N,A:2:32,4 --gpgpu_tex_cache:l1 8:128:5,L:R:m:N,F:128:4,128:2 --gpgpu_const_cache:l1 64:64:2,L:R:f:N,A:2:32,4 --gpgpu_cache:dl2 16:256:8,L:B:m:W,A:16:4,4 +-gpgpu_cache:il1 4:256:4,L:R:f:N:L,A:2:32,4 +-gpgpu_tex_cache:l1 8:128:5,L:R:m:N:L,F:128:4,128:2 +-gpgpu_const_cache:l1 64:64:2,L:R:f:N:L,A:2:32,4 +-gpgpu_cache:dl2 16:256:8,L:B:m:W:L,A:16:4,4 -gpgpu_cache:dl2_texture_only 1 -gpgpu_shmem_warp_parts 2 diff --git a/configs/TeslaC2050/gpgpusim.config b/configs/TeslaC2050/gpgpusim.config index 416b171..442ab8b 100644 --- a/configs/TeslaC2050/gpgpusim.config +++ b/configs/TeslaC2050/gpgpusim.config @@ -48,22 +48,23 @@ # In Fermi, the cache and shared memory can be configured to 16kb:48kb(default) or 48kb:16kb -# <nsets>:<bsize>:<assoc>,<rep>:<wr>:<alloc>:<wr_alloc>,<mshr>:<N>:<merge>,<mq>:**<fifo_entry> +# <nsets>:<bsize>:<assoc>,<rep>:<wr>:<alloc>:<wr_alloc>:<set_index_fn>,<mshr>:<N>:<merge>,<mq>:**<fifo_entry> # ** Optional parameter - Required when mshr_type==Texture Fifo --gpgpu_cache:dl1 32:128:4,L:L:m:N,A:32:8,8 +# Note: Hashing set index function (H) only applies to a set size of 32 or 64. +-gpgpu_cache:dl1 32:128:4,L:L:m:N:H,A:32:8,8 -gpgpu_shmem_size 49152 # The alternative configuration for fermi in case cudaFuncCachePreferL1 is selected -#-gpgpu_cache:dl1 64:128:6,L:L:m:N,A:32:8,8 +#-gpgpu_cache:dl1 64:128:6,L:L:m:N:H,A:32:8,8 #-gpgpu_shmem_size 16384 # 64 sets, each 128 bytes 8-way for each memory sub partition. This gives 786KB L2 cache --gpgpu_cache:dl2 64:128:8,L:B:m:W,A:32:4,4:0,32 +-gpgpu_cache:dl2 64:128:8,L:B:m:W:L,A:32:4,4:0,32 -gpgpu_cache:dl2_texture_only 0 --gpgpu_cache:il1 4:128:4,L:R:f:N,A:2:32,4 --gpgpu_tex_cache:l1 4:128:24,L:R:m:N,F:128:4,128:2 --gpgpu_const_cache:l1 64:64:2,L:R:f:N,A:2:32,4 +-gpgpu_cache:il1 4:128:4,L:R:f:N:L,A:2:32,4 +-gpgpu_tex_cache:l1 4:128:24,L:R:m:N:L,F:128:4,128:2 +-gpgpu_const_cache:l1 64:64:2,L:R:f:N:L,A:2:32,4 # enable operand collector -gpgpu_operand_collector_num_units_sp 6 |