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Diffstat (limited to 'src/gpgpu-sim/gpu-sim.h')
| -rw-r--r-- | src/gpgpu-sim/gpu-sim.h | 116 |
1 files changed, 116 insertions, 0 deletions
diff --git a/src/gpgpu-sim/gpu-sim.h b/src/gpgpu-sim/gpu-sim.h new file mode 100644 index 0000000..e30797e --- /dev/null +++ b/src/gpgpu-sim/gpu-sim.h @@ -0,0 +1,116 @@ +/* + * gpu-sim.h + * + * Copyright (c) 2009 by Tor M. Aamodt, Wilson W. L. Fung, Ali Bakhoda, + * George L. Yuan, Ivan Sham and the + * University of British Columbia + * Vancouver, BC V6T 1Z4 + * All Rights Reserved. + * + * THIS IS A LEGAL DOCUMENT BY DOWNLOADING GPGPU-SIM, YOU ARE AGREEING TO THESE + * TERMS AND CONDITIONS. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNERS OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * NOTE: The files libcuda/cuda_runtime_api.c and src/cuda-sim/cuda-math.h + * are derived from the CUDA Toolset available from http://www.nvidia.com/cuda + * (property of NVIDIA). The files benchmarks/BlackScholes/ and + * benchmarks/template/ are derived from the CUDA SDK available from + * http://www.nvidia.com/cuda (also property of NVIDIA). The files + * src/gpgpusim_entrypoint.c and src/simplesim-3.0/ are derived from the + * SimpleScalar Toolset available from http://www.simplescalar.com/ + * (property of SimpleScalar LLC) and the files src/intersim/ are derived + * from Booksim (Simulator provided with the textbook "Principles and + * Practices of Interconnection Networks" available from + * http://cva.stanford.edu/books/ppin/). As such, those files are bound by + * the corresponding legal terms and conditions set forth separately (original + * copyright notices are left in files from these sources and where we have + * modified a file our copyright notice appears before the original copyright + * notice). + * + * Using this version of GPGPU-Sim requires a complete installation of CUDA + * which is distributed seperately by NVIDIA under separate terms and + * conditions. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the University of British Columbia nor the names of + * its contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * 4. This version of GPGPU-SIM is distributed freely for non-commercial use only. + * + * 5. No nonprofit user may place any restrictions on the use of this software, + * including as modified by the user, by any other authorized user. + * + * 6. GPGPU-SIM was developed primarily by Tor M. Aamodt, Wilson W. L. Fung, + * Ali Bakhoda, George L. Yuan, at the University of British Columbia, + * Vancouver, BC V6T 1Z4 + */ + +#include <stdio.h> +#include <stdlib.h> +#include <math.h> +#include "zlib.h" + +#include "../option_parser.h" +#include "shader.h" +#include "dram.h" +#include "mem_fetch.h" + +#ifndef GPU_SIM_H +#define GPU_SIM_H + +#define NUM_SHADERS 8 +#define STREAMS_PER_FILE 128 + +//unsigned int run_gpu_sim(int grid_num); + +unsigned int get_converge_point(unsigned int pc, void *thd); + +#define GPU_RSTAT_SHD_INFO 0x1 +#define GPU_RSTAT_BW_STAT 0x2 +#define GPU_RSTAT_WARP_DIS 0x4 +#define GPU_RSTAT_DWF_MAP 0x8 + +//gpgpu_interwarp_mshr_merge +#define TEX_MSHR_MERGE 0x4 +#define CONST_MSHR_MERGE 0x2 +#define GLOBAL_MSHR_MERGE 0x1 + +//Prints out a verbose L1 miss rate per thread for shader 0 +#define GPU_RSTAT_L1MISS 0x10 +#define GPU_RSTAT_PDOM 0x20 +#define GPU_RSTAT_SCHED 0x40 + +//options for gpgpu_memlatency_stat +#define GPU_MEMLATSTAT_MC 0x2 +#define GPU_MEMLATSTAT_QUEUELOGS 0x4 + +//void gpu_reg_options(option_parser_t opp); +//void init_gpu(); +void gpu_print_stat(); + +int mem_ctrl_full( int mc_id ); + +void dramqueue_latency_log_dump(); + +#endif |