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-rw-r--r--src/gpuwattch/gpgpu_sim_wrapper.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gpuwattch/gpgpu_sim_wrapper.cc b/src/gpuwattch/gpgpu_sim_wrapper.cc
index ffd4650..22d0659 100644
--- a/src/gpuwattch/gpgpu_sim_wrapper.cc
+++ b/src/gpuwattch/gpgpu_sim_wrapper.cc
@@ -275,7 +275,7 @@ void gpgpu_sim_wrapper::set_ccache_power(double hits, double misses)
void gpgpu_sim_wrapper::set_tcache_power(double hits, double misses)
{
p->sys.core[0].tcache.read_accesses = hits * p->sys.scaling_coefficients[TC_H]+misses * p->sys.scaling_coefficients[TC_M];
- p->sys.core[0].tcache.read_misses = misses;
+ p->sys.core[0].tcache.read_misses = misses* p->sys.scaling_coefficients[TC_M];
perf_count[TC_H]=hits;
perf_count[TC_M]=misses;
// TODO: coalescing logic is counted as part of the caches power (this is not valid for no-caches architectures)