weft - CPEN 511 Project - Weft: Improving SIMD Utilization through MIMD-like Co-issue and Thread Compaction

Age	Commit message (Collapse)	Author
2014-08-14	gpu-cache revision #3. Now adding in function pointers for l1/l2 cache ↵	Tayler Hetherington
	access functions. Removes the multiple long flaky branches in the access functions (caused by multiple config options) and replaces them with a single function that is set in the constructor to reflect the current configuration. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14198]
2014-08-14	-change TeslaC2050 default configuration to PTX	Ahmed El-Shafiey
	-make the correlation script fails when the correlation number or the average absolute error get worse by > 3% -print a *.csv used by Jenkins to draw plots for the correlation and average absolute error with the changelist number [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14141]
2014-08-14	Rename/move file(s)	Ahmed El-Shafiey
	[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14127]
2014-08-14	Revision #2 of modifying the cache hierarchy.	Tayler Hetherington
	Separated the L1 and L2 cache access() implementations. Removed PRIVATE/SHARED cache scope configurations. Added WRITE_EVICT cache write policy. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14109]
2014-08-14	Same issue with Quadro and Tesla configuration file ("," -> ":")	Tayler Hetherington
	[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14083]
2014-08-14	Modified the cache hierarchy, reorganized code to eliminate code ↵	Tayler Hetherington
	replication, implemented write allocate / write back policies in L2 cache, added configurable parameters in gpgpusim.config ("W" = Write Allocate, "N" = No write allocate -> "P" = Private, "S" = shared), modified the cache configuration lines to always be separated by ":" instead of ":" and ",", and modified L1 and L2 data cache to be "Write Back" caches instead of "Read Only". Still need to implement Ahmed's sectored cache implementation. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14081]
2014-08-14	Changes to get the regression running:	Tim Rogers
	Removed the dependency on specifying the interconnect in the sweep file. Changed the extension on the icnt files to icnt instead of txt. Now we just copy any icnt file in the same directory as the config file [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13384]
2014-08-14	Adding a two level scheduler as described in the ISCA 2012 tutorial	Andrew M. B. Boktor
	[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13261]
2014-08-14	Updating the TeslaC2050 config to use the proper GDDR5 frequency and to ↵	Wilson Fung
	support the right number of threads. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13227]
2014-08-14	-Change Fermi configuration folder name to GTX480	Ahmed El-Shafiey
	-Adding TeslaC2050 configuration: this configuration was initially integrated in the power branch from fermi-boktor branch to get IPC correlation with the Tesla card on Inder pc (pc-12). The IPC correlation data on the public wiki uses this configuration. The latest update for dram GDDR5 configuration Wilson added is also integrated. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13225]