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2018-06-20Tensor core timing modelnegargoli93
2018-06-01wmma load workingaamir
2018-05-30changes for vector operandsaamir
2018-05-12commit for eece527projectnegargoli93
2017-11-12Fix latency bugNegar
2017-08-17Merged all work on the dev branch since the divergence point into the dnn ↵speverel
branch, incorporating Dynamic Parallelism and many bug fixes.
2017-05-17Changing the version detection to be much more detailed. Now the git commit ↵tgrogers
# and branch will be embedded in the built executable and print out when gpgpu-sim runs
2016-09-06Merge pull request #30 from sspenst/devgpgpu-sim
shfl instruction implemented
2016-09-05Merge pull request #28 from jwang323/cdp_cleangpgpu-sim
Initial support of CUDA Dynamic Parallelism on GPGPUSim
2016-09-02MOD: Add macros to turn off cuda_device_runtime for CUDA < 5.0Jin Wang
2016-08-24Cleanupsspenst
2016-08-24Added shfl instructionsspenst
2016-08-09Changed bsmad_impl to match Ahmed's output. Added latency and ↵sspenst
initiation_interval numbers for bsmad
2016-08-05Deleted useless commentssspenst
2016-08-05Added ptx_warp_info to know how many threads within a warp have executedsspenst
2016-08-05bsmad gives the correct output in the small cases I have tried, still need ↵sspenst
to complete the TODOs noted in bsmad_impl
2016-08-04A thread executing BSMAD is now able to access information from all threads ↵sspenst
in its warp
2016-07-08SST should now properly simulate the barrier operationsspenst
2016-07-06Added sstarr memory, which works the same as shared memorysspenst
2016-07-06ADD: print kernel parameter size footprint. BUG: concurrent kernels on same ↵Jin Wang
shader, should use hw_cta_id to store shared mem info
2016-07-06ADD: add separate cdp latencyJin Wang
2016-07-06ADD: add cdp latencyJin Wang
2016-07-05ADD: launch all device kernels at once in functional simulatorJin Wang
2016-07-05MOD: compute child parameter sizeJin Wang
2016-07-05BUG: PTX section id. ADD: cudaDeviceSetLimit. BUG: parameter addresses for ↵Jin Wang
child kernels in CDP. BUG: .weak .entry and .weak .global directives in ptx file. BUG: empty_protected() for stream manager causes deadlock, change to empty()
2016-07-05BUG: multiple child kernels finishJin Wang
2016-07-05BUG: do not handle cudaGetParameterBufferV2 and cudaLaunchDeviceV2 as ↵Jin Wang
call.uni in reconvergence
2016-07-05BUG: parameter alignmentJin Wang
2016-07-05MOD: add child kernel stream and scheduling supportJin Wang
2016-07-05ADD: add cudaGetParameterBufferV2 and add cudaLaunchDeviceV2 implementation. ↵Jin Wang
Kernel launch to stream not yet implemented
2016-07-04Restored madp instruction.speverel
2016-06-13If ptxas notices any duplicate errors, they now automatically get resolved ↵sspenst
and the program continues with the duplicate function/variable declarations removed.
2016-06-02Added handling of .cc option for arithmetic instructions. NOTE: Only made ↵speverel
changes to parse instructions. Carry functionality NOT fully implemented; .cc instructions function like their unmodified ueqivelents. Also modified GTX750Ti config to model L1 data cache as simply not being used for global loads (instead of not existing at all). Changed ptxinfo parsing to avoid crashing when info includes texture information.
2015-03-04initial support for CUDA 5.0, 5.5, 6.0 to get template from SDK runningAhmed ElTantawy
2014-08-14This should fix 2.3 regression and may fix others as well.Ahmed El-Shafiey
Remove redudant definition for some tokens which confuses the parser [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 18462]
2014-08-14Support for named bariers + bar.red + bar.arrive instructionsAhmed El-Shafiey
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 18452]
2014-08-14Intesim2 IntegrationDongdong Li
Details: See Review 80001 https://gpgpu-sim-code-review.appspot.com/80001/ [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16747]
2014-08-14Adding the ability to querry the WARPSZ flag from the ptx script.Tim Rogers
Also changed some initialization code when cores are created in both the funcational and perfromance simulator review:3001 lgtm:5 [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16506]
2014-08-14Fixing bug 59 + cleaning some code related to the power modelAhmed El-Shafiey
Review ID:32001 [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16205]
2014-08-14Removing a slew of code still compiled with gcc and the need for a bunch of ↵Tim Rogers
external C linkage [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15912]
2014-08-14Fixing a bug exposed by the fix for bug 42.Tim Rogers
The "_" "null" register potentially generated by ptx and intentionally generated by ptxplus was being initialized without a type. This caused the parser to think it was not a register. Fix is to allow the parser to think of it as register, but ensure the arch-sim does not by adding a flag indicating that it is special. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15305]
2014-08-14MergingTim Rogers
//depot/gpgpu_sim_research/fermi_tim/... to //depot/gpgpu_sim_research/fermi/... Integrating CLs up to 15295. Descriptions of these CL's are included. *** A couple changes to aeriel-vision for warp issue plot support *** More arielvision changes to support the variable-entry length stacked bar chart *** Properly printing the right resolution of dynamic warp ids ***. Generalized the scheduler code and added detailed statistics for which warps issue each cycle. Verified the execution of the LRR scheduler - still have to get the two level scheduler to work. *** Implementing the 2lvl scehduler has it has been originally coded. LRR on both the inner and outer levels *** Adding in a debug tracing system to GPGPU-Sim. I am sick of writing debug code - then having to comment out, ifdef out or delete it to checkin. This also allows for print streams so the user can decided which traces they would like to see. Every print in GPGPU-Sim should go through this system - then it will be really easy to only get the information you want and more importantly people will (a) write and (b) checkin code that actually profiles what they are building. Reading tracefiles is superiour in many ways to single stepping since you can print the world and just vet the logfile for what you need. This also fascilitates advice from the Debugging Rules! book which states that you should never throw away a debugging tool. Having debug prints that don't get thrown away is big. *** Allowing the trace to be specified in the Make. Run Make TRACE=0 to compile the code without any traces *** Allowing prints from the performance sim to get the actual ptx instruction text *** Getting the two level scheduler to actaully work... What is released in fermi does not work at all - it effectively performs "static warp limit" from my CCWS paper. Warps are never demoted from the active list since the functionality checking to see if they are waiting on a longop is completly broken. Maybe if the original author had access to the tracing functions this would not have happened. The islongop test was completely broken. It did not mark the register as used, it marked the register number in the instruction as used. For example if this instruction was creating a long op: ld r6 [r1] It would mark register 0 as waiting for a long op (since it is register 0 of the two registers in this instruction), not register 6. Additionally, whenever ANY instruction from a warp releases registers, ALL the longops being tracked for this warp get cleared.... The only way anyone ever thought this worked is if they did not test it.... *** Reworking the warp schedulers to share common code. Making the GTX480 use gto by default. I am not sure wht they really use, but it really can't be LRR. Also adding in a new file for custom shared trace defines. These are useful when you want a print that has some additional criteria or information printed. Verified that the schedulers all work to a first order based on traces. *** Making it so you can run the stats collection scripts from any directory. Also allow the caller to specify a stats file instead of just assume its always the same one [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15296]
2014-08-14 Fixing a slew of compiler warningsTim Rogers
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15218]
2014-08-14fixing bug 36 + put a mistakenly missing texture misses power scalingAhmed El-Shafiey
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15105]
2014-08-14fixing a bug that cause the thread_fence benchmark fails (excluding an ↵Ahmed El-Shafiey
opcode that does not have operands "mem_bar" from checking its operands types) [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14738]
2014-08-14Merging Power model into FermiTayler Hetherington
//depot/gpgpu_sim_research/fermi_power/distribution/... to //depot/gpgpu_sim_research/fermi/distribution/... [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14723]
2014-08-14Fixed a bug introduced in CL14565 for PTXPlus.Wilson Fung
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14566]
2014-08-14Extended PTX parser to recognize the .ptr .shared directive and allocate ↵Wilson Fung
shared memory buffer to those pointers. This is required to support OpenCL local memorywith the newer NVIDIA driver. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14565]
2014-08-14Fixed the timing model for LDU instruction, before it was not recognized as ↵Wilson Fung
a memory instruction in the timing model. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14538]
2014-08-14Adding support for cudaReadModeNormalizedFloat (a texture read mode). See ↵Wilson Fung
bug 18 (external) for detail. The blocked SDK benchmarks are still not working due to mismatch of texture element layout in memory between real GPU and GPGPU-Sim. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13933]
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