| Age | Commit message (Collapse) | Author |
|
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 18452]
|
|
Details: See Review 80001 https://gpgpu-sim-code-review.appspot.com/80001/
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16747]
|
|
Also changed some initialization code when cores are created in both the funcational and perfromance simulator
review:3001 lgtm:5
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16506]
|
|
Review ID:32001
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16205]
|
|
external C linkage
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15912]
|
|
The "_" "null" register potentially generated by ptx and intentionally generated by ptxplus was being initialized without a
type. This caused the parser to think it was not a register.
Fix is to allow the parser to think of it as register, but ensure the arch-sim does not by adding a flag indicating
that it is special.
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15305]
|
|
//depot/gpgpu_sim_research/fermi_tim/...
to //depot/gpgpu_sim_research/fermi/...
Integrating CLs up to 15295. Descriptions of these CL's are included.
***
A couple changes to aeriel-vision for warp issue plot support
***
More arielvision changes to support the variable-entry length stacked bar chart
***
Properly printing the right resolution of dynamic warp ids
***.
Generalized the scheduler code and added detailed statistics for which warps issue each cycle.
Verified the execution of the LRR scheduler - still have to get the two level scheduler to work.
***
Implementing the 2lvl scehduler has it has been originally coded.
LRR on both the inner and outer levels
***
Adding in a debug tracing system to GPGPU-Sim.
I am sick of writing debug code - then having to comment out, ifdef out or delete it to checkin.
This also allows for print streams so the user can decided which traces they would like to see.
Every print in GPGPU-Sim should go through this system - then it will be really easy to only get the information you want and more importantly people will (a) write and (b) checkin code that actually profiles what they are building.
Reading tracefiles is superiour in many ways to single stepping since you can print the world and just vet the logfile for what you need.
This also fascilitates advice from the Debugging Rules! book which states that you should never throw away a debugging tool. Having debug prints that don't get thrown away is big.
***
Allowing the trace to be specified in the Make.
Run Make TRACE=0 to compile the code without any traces
***
Allowing prints from the performance sim to get the actual ptx instruction text
***
Getting the two level scheduler to actaully work...
What is released in fermi does not work at all - it effectively performs "static warp limit" from my CCWS paper.
Warps are never demoted from the active list since the functionality checking to see if they are waiting on a longop is completly broken.
Maybe if the original author had access to the tracing functions this would not have happened.
The islongop test was completely broken. It did not mark the register as used, it marked the register number in the instruction as used.
For example if this instruction was creating a long op:
ld r6 [r1]
It would mark register 0 as waiting for a long op (since it is register 0 of the two registers in this instruction), not register 6.
Additionally, whenever ANY instruction from a warp releases registers, ALL the longops being tracked for this warp get cleared....
The only way anyone ever thought this worked is if they did not test it....
***
Reworking the warp schedulers to share common code.
Making the GTX480 use gto by default. I am not sure wht they really use, but it really can't be LRR.
Also adding in a new file for custom shared trace defines. These are useful when you want a print that has some
additional criteria or information printed.
Verified that the schedulers all work to a first order based on traces.
***
Making it so you can run the stats collection scripts from any directory.
Also allow the caller to specify a stats file instead of just assume its always the same one
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15296]
|
|
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15218]
|
|
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15105]
|
|
opcode that does not have operands "mem_bar" from checking its operands types)
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14738]
|
|
//depot/gpgpu_sim_research/fermi_power/distribution/...
to //depot/gpgpu_sim_research/fermi/distribution/...
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14723]
|
|
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14566]
|
|
shared memory buffer to those pointers. This is required to support OpenCL local memorywith the newer NVIDIA driver.
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14565]
|
|
a memory instruction in the timing model.
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14538]
|
|
bug 18 (external) for detail. The blocked SDK benchmarks are still not working due to mismatch of texture element layout in memory between real GPU and GPGPU-Sim.
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13933]
|
|
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13761]
|
|
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13703]
|
|
There is a problem with the linkage on my machine. Before this changelist the code didn't build on my machine. After it it builds but fails to run due to missing dynamic linkage. And obviously it breaks the jenkins build.
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13684]
|
|
Fixing failed compilation due to double definition of parsing functions
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13683]
|
|
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13455]
|
|
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13435]
|
|
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13410]
|
|
informative)
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13399]
|
|
callp_imp using a core_t function, thus moving the querying function into the abstract model of the core instead of shader_core_ctx which represents the performance mode. This code simplify the querying and also avoid the unnecessary calling hierarchy that was used.
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13375]
|
|
need to modify carry and overflow flags.
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13317]
|
|
imply user should bugger off and stop asking developer for help)
- Remove ridiculously long and cryptic comment from setup_environment. Most people will use CUDA_INSTALL_PATH.
- Remove decuda targets from Makefile
- Add check to Makefile to insist that setup_environment was run first
- Add version file (eliminate redundancy) and remove version strings from src/cuda-sim/cuda-sim.cc
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 12874]
|
|
last stable release (i.e., this is a "development" branch)
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 12830]
|
|
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 12558]
|
|
The observed latencies are reduced by 5 to account for other stages in the SM pipeline
Eventually this should be calibrated against the microbenchmarks
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 12310]
|
|
1. Adds support for using cuobjdump for both ptx and ptxplus execution. This has been tested with CUDA 4.0
. Ptxplus is no longer supported through decuda/decuda_to_ptxplus
2. Adds support for converting the SASS output by cuobjdump to ptxplus. This has been tested with CUDA 4.0
. The old path that extracts ptx from cubin files is still preserved
3. Adds a bank group model. (WARNING: memory config has changed, please adapt yours). To disable the bank groups model, set nbkgrp to 1 and tCCDL and tRTPL to 0
Diff the configuration files to learn about how to use those new options.
Merging
//depot/gpgpu_sim_research/fermi-test/distribution/...
to //depot/gpgpu_sim_research/fermi/distribution/...
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 12023]
|
|
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 11587]
|
|
because one can have 4 input operands and 4 register operands in a surface store instruction.
Fixed arch_regs for memory instructions being ignored in the pre-decode statge.
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 11576]
|
|
predecode. See Bug 138
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 11573]
|
|
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 11486]
|
|
Merging
//depot/gpgpu_sim_research/fermi_ayoub/distribution/src/cuda-sim/cuda-sim.cc
//depot/gpgpu_sim_research/fermi_ayoub/distribution/src/cuda-sim/cuda-sim.h
//depot/gpgpu_sim_research/fermi_ayoub/distribution/src/cuda-sim/instructions.cc
//depot/gpgpu_sim_research/fermi_ayoub/distribution/src/cuda-sim/ptx_sim.h
to //depot/gpgpu_sim_research/fermi/distribution/src/cuda-sim/...
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 11288]
|
|
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 10969]
|
|
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 10936]
|
|
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 10934]
|
|
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 10933]
|
|
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 10753]
|
|
cudasim.
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 10695]
|
|
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 10090]
|
|
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 10013]
|
|
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 9924]
|
|
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 9917]
|
|
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 9901]
|
|
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 9872]
|
|
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 9691]
|
|
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 9687]
|
|
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 8389]
|