aboutsummaryrefslogtreecommitdiff
path: root/src/cuda-sim/instructions.cc
AgeCommit message (Collapse)Author
2014-08-14Changing the QuadroFX5800 config to use compute capability 1.3 (no idea why ↵Wilson Fung
it was not...). Adding sign-extension mode for cvt.s16.s32 that writes to a .u32 register. Adding stub parsing for .maxnctapersm directive. Removing benchmarks with known-issues from regression list for now. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14572]
2014-08-14Added functional execution support for shared memory atomic operations.Inderpreet Singh
Integrated in CL14335 and CL14336 [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14366]
2014-08-14Several changes to ptxplus towards getting the sphyraena benchmark to work. ↵Jimmy Kwa
Add .false modifier to cuobjdump_to_ptxplus. It isn't supported in gpgpusim yet since we don't know what it does. Fixed most of the issues with global (const14) variable not being declared properly. Added "BRX" instruction to cuobjdump_to_ptxplus and some support for it in gpgpusim. There are other issues with it that still need to be worked out. Added support for translating IADD.CARRY sass instruction into ptxplus addp instructions. Fixed a bug with generating ".half" modifiers on instructions so the ptxplus instruction addresses should match sass addresses now. Separated ssy instructions from nop. However, they are still simulated as nop in gpgpusim. Sometime cuobjdump generate a blank link that takes up an address slot. This was changed to a nop. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14001]
2014-08-14Added implementation of vote.ballot (passing directed test). Added popc ↵Wilson Fung
(not tested). Reducing number of iterations for radixSortThrust for regression. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13993]
2014-08-14Fixing texture fetching for 1D texture with non-normalized coordinates: ↵Wilson Fung
Adding support for the floating point input coordinate, and handling of out-of-bound coordinates. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13959]
2014-08-14Fixing multi-element texel access. Now texture with RGBA components are ↵Wilson Fung
read properly. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13949]
2014-08-14Adding support for cudaReadModeNormalizedFloat (a texture read mode). See ↵Wilson Fung
bug 18 (external) for detail. The blocked SDK benchmarks are still not working due to mismatch of texture element layout in memory between real GPU and GPGPU-Sim. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13933]
2014-08-14Fixing bugs 169, 170, 171Ahmed El-Shafiey
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13761]
2014-08-14Integration from tm-311 branch. Adding support for atomic operation with ↵Wilson Fung
generic memory space. Also adding a define to allow support for OpenCL 1.0 commands that are deprecated in OpenCL 1.1. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13722]
2014-08-14Back out changelist 13683Andrew M. B. Boktor
There is a problem with the linkage on my machine. Before this changelist the code didn't build on my machine. After it it builds but fails to run due to missing dynamic linkage. And obviously it breaks the jenkins build. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13684]
2014-08-14Removing compiler warningsAndrew M. B. Boktor
Fixing failed compilation due to double definition of parsing functions [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13683]
2014-08-14Fix for bug 9: Now querying the state of the pdom stack in call_imp and ↵Ayub Gubran
callp_imp using a core_t function, thus moving the querying function into the abstract model of the core instead of shader_core_ctx which represents the performance mode. This code simplify the querying and also avoid the unnecessary calling hierarchy that was used. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13375]
2014-08-14Fix for bug #154-internal and #8-externalAndrew M. B. Boktor
Adding support for double destination to mad instruction Fixing broken madp instruction Adding a patch to cuobjdump_to_ptxplus to work around the C3 problem (Documented in bug #154 internal). [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13349]
2014-08-14Adding the madp instruction, which does multiply add with carry-in. Still ↵Wilson Fung
need to modify carry and overflow flags. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13317]
2014-08-14Adding support in the simulator for addition with carry specified in a given ↵Andrew M. B. Boktor
predicate register (calling it addp) Adding support in cuobjdump_to_ptxplus for IADD.CARRY* which translates to the above Now power benchmarks should work [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 12266]
2014-08-14This changelist implements the following:Andrew M. B. Boktor
1. Adds support for using cuobjdump for both ptx and ptxplus execution. This has been tested with CUDA 4.0 . Ptxplus is no longer supported through decuda/decuda_to_ptxplus 2. Adds support for converting the SASS output by cuobjdump to ptxplus. This has been tested with CUDA 4.0 . The old path that extracts ptx from cubin files is still preserved 3. Adds a bank group model. (WARNING: memory config has changed, please adapt yours). To disable the bank groups model, set nbkgrp to 1 and tCCDL and tRTPL to 0 Diff the configuration files to learn about how to use those new options. Merging //depot/gpgpu_sim_research/fermi-test/distribution/... to //depot/gpgpu_sim_research/fermi/distribution/... [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 12023]
2014-08-14Adding 64-bit support for atomicAdd, atomicExch, atomicCAS and created a ↵Wilson Fung
brief directed test. Added floating point support for atomicAdd without testing. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 11894]
2014-08-14Integration change. Fix for div_impl with 32-bit and smaller integers.Wilson Fung
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 11310]
2014-08-14Integrating the pure functional simulationAyub Gubran
Merging //depot/gpgpu_sim_research/fermi_ayoub/distribution/src/cuda-sim/cuda-sim.cc //depot/gpgpu_sim_research/fermi_ayoub/distribution/src/cuda-sim/cuda-sim.h //depot/gpgpu_sim_research/fermi_ayoub/distribution/src/cuda-sim/instructions.cc //depot/gpgpu_sim_research/fermi_ayoub/distribution/src/cuda-sim/ptx_sim.h to //depot/gpgpu_sim_research/fermi/distribution/src/cuda-sim/... [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 11288]
2014-08-14change copyright notice to include authorsTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 9872]
2011-06-29changing copyright to BSDTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 9687]
2010-12-15Added next instruction type to ptxplus, ".ff64". It's the same as ".f64" ↵Jimmy Kwa
except it reads and stores from two adjacent registers instead of a single 64 bit register. ".ff64" instructions are now printed in decuda_to_ptxplus. Support in the simulator for ".ff64" has been added but it is untested. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 8278]
2010-10-240.9756 correlation. Set L1T line size to 128 bytes... problem wasTor Aamodt
stalling to send four requests per warp into L1T tag lookup. If L1T is really 32B blocks (as per Henry's paper), this suggests banking of L1T needs to be modeled. Other changes: 1. bug fix in memory access generation for texture/const cache access 2. adding back memory latency measurement for visualizer [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7913]
2010-10-22enables global loads/stores for ptxplusTor Aamodt
passing CUDA 3.1 and ptxplus correlation correlation back to around 0.89 on ptxplus vs quadro fx5800 [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7898]
2010-10-121. adding simt_core_cluster, which models a TPC or (for fermi) GPC...Tor Aamodt
this gives us a place to stick caches shared among shader cores but on the shader side of the interconnect... maybe move the clock boundary code here? after integrating booksim 2 code? 2. added a pending write table to ldst_unit rather than scoreboard ... rationale is that ld/st unit needs to process register writes once it is done it can notify scoreboard once. 3. re-enabled shared memory delay (use pipeline within ldst_unit) 4. re-enabling operand collector writeback for all instruction types 5. disable MSHRs in this change list passing CUDA 3.1 regression next? texture cache, then redo mshrs? [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7845]
2010-10-09refactoring: moving texture reference mappings into gpgpu_t Tor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7835]
2010-10-081. refactoring cuda api code for loading PTX (removing external PTX loading ↵Tor Aamodt
entirely) 2. some bug fixes for warp_inst_t 3. creating a new class, gpgpu_t, which contains the functional "memory" state visible to all threads running on a GPU (doing this as part of my continuing effort to hunt down and eradicate every global variable that is not the top level "the gpu") 4. other misc. changes Almost passing CUDA 3.1 regression? oclHistogram keeps failing under torque, but does not fail when run on the command line from the same directory. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7827]
2010-10-05broken change list: builds, but does not run, yetTor Aamodt
refactoring: create warp_inst_t that provides notion of a group of scalar instructions traveling down the pipeline. delete DWF delete MIMD delete warp_tracker delete old writeback stage, replace it with a stub that just writes back everything delete old pipeline model current status: MSHR's need to change to deal with the new structure [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7814]
2010-10-01integrating recent changes from fermi-test into fermiTor Aamodt
(i'll use "fermi" for more disruptive changes to the pipeline model such as updating the MSHRs and getting rid of the warp tracker, ripping out DWF, etc...) [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7805]
2010-08-30integrating CL 7421-7434 from fermi-test Tor Aamodt
this integrates the ptxplus functional model changes, but has only been verified with CUDA 3.1 PTX regressions (which pass) still need to verify ptxplus itself is working in this branch [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7435]
2010-08-29- integrate changes from fermi-test (CL's under that path in range 7261-7418).Tor Aamodt
(add scoreboard logic from ptxplus branch and modified operand collector with parallel ALU/SFU pipelines) passing regressions [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7419]
2010-08-23- add '-keep' option to keep intermediate files (used for OpenCL only right now)Tor Aamodt
- remove redundant initialization code of options (which confuses new users) - make bool option variables bool type - remove some more extern decls [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7247]
2010-08-08refactoring: moving PTX parsing functions into ptx_parser.*Tor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7167]
2010-08-08refactoring: moving 'loading' operations into ptx_loader.*Tor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7166]
2010-08-07watchpoint facility for ptx debuggingTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7160]
2010-07-21- reduce 3.1 sdk regression test runtimes (as per 2.3 sdk versions)Tor Aamodt
- add ldu support (just use ld for now) - get rid of asserts for .const[n] - status: cuda sdk 3.1 dct8x8, eigenvalues, MersenneTwister, reduction, scan still running (too slow) ocl sdk 3.1 oclQuasirandomGenerator still running (too slow) ocl sdk 3.1 oclReduction fail comparison (cuda 3.1) ocl sdk 3.1 oclMatrixMul exits mid computation ocl sdk 3.1 oclTranspose hits "clCreateBuffer - buffer already created for this host variable" ocl sdk 3.1 oclSortingNetworks fails w/ message about min workgroup size remaining 30 tests pass [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6927]
2010-07-19OpenCL running on simulator w/ CUDA 3.1 and nvidia driver 256.35Tor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6907]
2010-07-18finished refactor+implement call/return passing (now working on simple ↵Tor Aamodt
example included in this CL) [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6886]
2010-07-18more refactoring of param passingTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6885]
2010-07-18continuing refactoring Tor Aamodt
modify template to actually do a function call (for testing real function call, not printf) [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6884]
2010-07-18refactoring call/return ABI code (want unified interface for call/return ↵Tor Aamodt
reg/param) [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6883]
2010-07-18finished moving cuda printf stuff to seperate file (step 2)Tor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6882]
2010-07-18refactoringTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6880]
2010-07-18- simple device printf support added (supports %u, %d, %f)Tor Aamodt
- add support to call_impl for passing values in through local param space (need to add support for return) - track local framesize during ptx parsing / update local stack-pointer during call/return - detect appropriate param space for ld.param (and st.param) depending upon address symbol's scope - putting back the crazy math for local mem allocation (seems to be required) - bug fix for global byte array initialization - force ld and st w/o space specifier to be generic_space - make type_decode method of type_info_key - adjust debug printing so listing of code and CFG information requires higher numbers (100 and 50) - local param ld/st accesses treated like local ld/st for timing model [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6878]
2010-07-17- added *implied* local memory stack pointer for functional execution Tor Aamodt
(still need to determine framesize during parsing, and need to support alternate mode were stack pointer is explicit register a la zev...) - define local param mapping to local memory for functional execution [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6875]
2010-07-17param space updates for correct parsing (still need to allocate thread Tor Aamodt
local storage for local param memory) [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6871]
2010-07-17- adding new memory_space_t type to enable differentiation of differentTor Aamodt
parameter spaces (kernel parameters are conceptually different from function parameters, but PTX only has one .param keyword) - removing more dead code [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6870]
2010-07-17integrating Wilson's bugfixes from release branchTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6869]
2010-07-17- add support for ld/st with generic addressesTor Aamodt
- add support for parsing cache operators (still need to pass to timing model) [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6868]
2010-07-17- add support for cvta and isspacep instructions (currently assumingTor Aamodt
a fixed address mapping between shared,local to generic that depends upon hardware thread context used... might be interesting to explore tradeoffs at some point) - remove util.h... we don't need TRUE, FALSE anymore now that everything is C++ - remove some dead code from shader_decode [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6867]