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CPEN 511 Project - Weft: Improving SIMD Utilization through MIMD-like Co-issue and Thread Compaction
Davit Grigoryan
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dram.cc
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Author
2014-08-14
Fixed the DRAM timing model to add the write-read turn and write-precharge de...
Wilson Fung
2014-08-14
change copyright notice to include authors
Tor Aamodt
2011-06-29
changing copyright to BSD
Tor Aamodt
2011-01-02
integrate bug fix (passes fast regression)
Tor Aamodt
2010-11-28
enabling L2 data cache... it is write through, write evict like L1.
Tor Aamodt
2010-10-24
1. adding top level configuration class and making shader and memory configur...
Tor Aamodt
2010-10-18
Re-designed cache model:
Tor Aamodt
2010-10-16
1. moving address decoding into a class (and out of cache entirely)
Tor Aamodt
2010-10-02
refactor: mem_fetch now a class
Tor Aamodt
2010-10-02
refactoring: make shd_cache_t into a class (cache_t), plus some other cleanin...
Tor Aamodt
2010-10-01
integrating recent changes from fermi-test into fermi
Tor Aamodt
2010-08-29
- integrate changes from fermi-test (CL's under that path in range 7261-7418).
Tor Aamodt
2010-08-09
refactor: remove extern decl up to gpgpusim_entrypoint.cc
Tor Aamodt
2010-08-08
refactor: shader.cc free of extern declarations
Tor Aamodt
2010-07-15
creating branch for adding support for CUDA 3.x and Fermi
Tor Aamodt