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path: root/src/gpgpu-sim/dram_sched.cc
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2019-09-13Big reformat change using clang-format-6.0Nick
2019-09-13Revert "Add src/gpgpu-sim formatting"Nick
This reverts commit 9c9b1341613e767f306b2b73b5b8a5317b6ee563.
2019-09-13Add src/gpgpu-sim formattingNick
2019-05-15make gpu_tot_cycle local variable not global variableMahmoud
2018-08-27fixing ead/write buffer and new configs filesMahmoud
2017-10-30adding new stats and change the PascalP100-HBM configMahmoud
2017-10-27add more statistics and chaging Pascal configMahmoud
2017-10-25The commits includes:Mahmoud
1- REEAD/WERITE buffer for DRAM 2- Fixing FETCH_ON_WRITE cahce policy bug
2017-09-12Adding HBM modelMahmoud
2014-08-14bug31Ayub Gubran
1. Renaming '-gpgpu_dram_sched_queue_size' to '-gpgpu_frfcfs_dram_sched_queue_size' 2. Updating the output not print that statistic out at all if the DRAM access scheduler is FIFO. 3. Adding "-gpgpu_dram_return_queue_size" option to specify the return queue size (defualt 1024). config files should take this change into account [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15227]
2014-08-14 Fixing a slew of compiler warningsTim Rogers
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15218]
2014-08-14Merging Power model into FermiTayler Hetherington
//depot/gpgpu_sim_research/fermi_power/distribution/... to //depot/gpgpu_sim_research/fermi/distribution/... [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14723]
2014-08-14Back out changelist 13683Andrew M. B. Boktor
There is a problem with the linkage on my machine. Before this changelist the code didn't build on my machine. After it it builds but fails to run due to missing dynamic linkage. And obviously it breaks the jenkins build. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13684]
2014-08-14Removing compiler warningsAndrew M. B. Boktor
Fixing failed compilation due to double definition of parsing functions [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13683]
2014-08-14change copyright notice to include authorsTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 9872]
2011-06-29changing copyright to BSDTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 9687]
2010-10-241. adding top level configuration class and making shader and memory ↵Tor Aamodt
configuration components of this class. 2. clock memory pipeline no. subwarp times for each shader clock and increase rob-size for texture cache (trying to improve correlation, currently at 0.9218) 3. start to modify shader stats to add back features for visualizer (warp divergence distribution kind of working again) passing cuda 3.1 regression and ptxplus correlation tests [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7909]
2010-10-18Re-designed cache model:Tor Aamodt
- read only cache model with integrated mshrs (no L1D, yet); new cache interface should be easily extendable to support texture cache with latency fifo and separate tag/data arrays, though this is not yet added (currently tags and data arrays are not decoupled for texture) - new partition model using the above removes all old MSHRs, L1D etc... passing CUDA 3.1 regression [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7875]
2010-10-161. moving address decoding into a class (and out of cache entirely)Tor Aamodt
2. moving DRAM timing parameters into memory_config class 3. removing some likely useless statistics 4. other cleaning up of code passing CUDA 3.1 regression [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7868]
2010-10-01integrating recent changes from fermi-test into fermiTor Aamodt
(i'll use "fermi" for more disruptive changes to the pipeline model such as updating the MSHRs and getting rid of the warp tracker, ripping out DWF, etc...) [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7805]
2010-08-09refactor: remove extern decl up to gpgpusim_entrypoint.ccTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7178]
2010-08-08refactor: shader.cc free of extern declarationsTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7176]
2010-08-08refactoring: continued, buildsTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7174]
2010-08-08refactoring: mem_latency_stat in impl, etc...Tor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7173]
2010-07-17- add support for cvta and isspacep instructions (currently assumingTor Aamodt
a fixed address mapping between shared,local to generic that depends upon hardware thread context used... might be interesting to explore tradeoffs at some point) - remove util.h... we don't need TRUE, FALSE anymore now that everything is C++ - remove some dead code from shader_decode [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6867]
2010-07-15creating branch for adding support for CUDA 3.x and FermiTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6829]
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