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path: root/src/gpgpu-sim/gpu-sim.h
AgeCommit message (Expand)Author
2018-10-07Unrolling Aksahy's stats - as they seem to be really screwing things up.tgrogers
2018-05-01Added support for -gpgpu_registers_per_block configSuchita Pati
2018-04-10added config -gpgpu_shmem_per_block and fixed cudaGetDeviceAttributes functionSuchita Pati
2018-03-22Change 252 by jain156@akshayj-lt1 on 2017/05/29 10:51:32Akshay Jain
2017-11-18fixing a stupid inheritance bugtgrogers
2017-11-18Making the perf sim copy optional, getting rid of an assert that will happen ...tgrogers
2017-11-18vectoradd is successfully filling the l2tgrogers
2017-10-30adding new stats and change the PascalP100-HBM configMahmoud
2017-10-27add more statistics and chaging Pascal configMahmoud
2017-10-26Changing the Titan X config file to use the last modificationsMahmoud
2017-10-25The commits includes:Mahmoud
2017-09-12Adding HBM modelMahmoud
2017-07-20Fixing BankGroup Indexing BugMahmoud
2017-07-12Fixing BankGroup Indexing BugMahmoud
2016-07-05MOD: add child kernel stream and scheduling supportJin Wang
2015-06-05Fixing bug with max cycle/instruction/cta + bug with C++ name de-mangling wit...Tayler Hetherington
2014-08-14Redesigned the memory partition unit to support multiple L2 cache banks per p...Wilson Fung
2014-08-14Adding new option '-liveness_message_freq', which throttles the frequency of ...Wilson Fung
2014-08-14Review: 33001. Updating/cleaning up the cache statistics. Moving the statisti...Tayler Hetherington
2014-08-14make sure L1 cache is flushed at a configuration change between kernels, even...Ahmed El-Shafiey
2014-08-14 - Adding support for cudaFuncSetCacheConfig API, that allows changing theAhmed El-Shafiey
2014-08-14MergingTim Rogers
2014-08-14bug31Ayub Gubran
2014-08-14Fixing L2 WriteBack bug caused by using the partition address for both set in...Tayler Hetherington
2014-08-14Now even the power model log will have kernel names printed out.Wilson Fung
2014-08-14Added kernel name and launch uids to the stat printout to simplify per-kernel...Wilson Fung
2014-08-141- it seems like using #ifdef within a class definition confuses valgrind, re...Ahmed El-Shafiey
2014-08-14MergingAhmed El-Shafiey
2014-08-14fixing a segfault problem for Quadro config with interconnect statsAhmed El-Shafiey
2014-08-14Merging Power model into FermiTayler Hetherington
2014-08-14Updated the option parser to support named sub-options (via a separate instan...Wilson Fung
2014-08-14Fix for bug 9: Now querying the state of the pdom stack in call_imp and callp...Ayub Gubran
2014-08-14Fixed GDDR5 parameters in Fermi config:Wilson Fung
2014-08-14A much easier way to attempt to fix the problem targeted by CL12362 is to jus...Andrew M. B. Boktor
2014-08-14Changing the configs to be backward compatible by disabling bank groups by de...Andrew M. B. Boktor
2014-08-14This changelist implements the following:Andrew M. B. Boktor
2014-08-14Turned ROP and DRAM latency/delays into optionsInderpreet Singh
2014-08-14Fixing bug 126. Now DXTC runs to completion by not giving correct result (ex...Wilson Fung
2014-08-14Integrating the pure functional simulationAyub Gubran
2014-08-14Integration change. - CL 9058 , adding the l1 cache stat print to the end of ...Tim Rogers
2014-08-14Fixed the DRAM timing model to add the write-read turn and write-precharge de...Wilson Fung
2014-08-14change copyright notice to include authorsTor Aamodt
2011-06-29changing copyright to BSDTor Aamodt
2010-12-28- parameter memory and active threads now part of kernel_info_t:Tor Aamodt
2010-12-28- Checkpointing new support for concurrent kernel execution (CUDA only, not O...Tor Aamodt
2010-11-28enabling L2 data cache... it is write through, write evict like L1.Tor Aamodt
2010-10-241. updates to .gdbinit fileTor Aamodt
2010-10-24add back per shader icount tracking for visualizerTor Aamodt
2010-10-241. adding top level configuration class and making shader and memory configur...Tor Aamodt
2010-10-18Re-designed cache model:Tor Aamodt
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