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path: root/src/gpgpu-sim/l2cache.h
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2019-09-13Big reformat change using clang-format-6.0Nick
2019-09-13Revert "Add src/gpgpu-sim formatting"Nick
This reverts commit 9c9b1341613e767f306b2b73b5b8a5317b6ee563.
2019-09-13Add src/gpgpu-sim formattingNick
2019-08-22Merge branch 'dev' of https://github.com/purdue-aalp/gpgpu-sim_distribution ↵Mahmoud
into dev-private
2019-07-29adding simple dram modelMahmoud
2019-07-14Move sm_next_access_uidMengchi Zhang
Signed-off-by: Mengchi Zhang <[email protected]>
2019-06-19Merge remote-tracking branch 'upstream/dev' into devtgrogers
2019-05-15make gpu_tot_cycle local variable not global variableMahmoud
2019-02-20Add full support for deprecated AerialVision L2 statsNick
2019-02-19Add initial infrastrucutre to support L2 (and other) cache statistics for ↵Nick
AerialVision
2018-08-22adding lazy-fetch-on-read and invalidate operation to cacheMahmoud
2017-11-18fixing the cycle issues with using the cudamemcpiestgrogers
2017-11-18vectoradd is successfully filling the l2tgrogers
2017-10-11Merge branch 'dev-purdue-integration' of ↵Mahmoud
https://github.rcac.purdue.edu/abdallm/gpgpu-sim_distribution into dev-purdue-integration
2014-08-14Lengthened the DRAM return queue size to have enough credits in order to ↵Wilson Fung
keep the DRAM utilized. Also extended the state printing function to print out mem_fetch entries inside the DRAM delay queue. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16639]
2014-08-14Redesigned the memory partition unit to support multiple L2 cache banks per ↵Wilson Fung
partition. Each L2 cache banks has its own connection to the interconnection network to allow L2 bandwidth to scale without increase the number of memory parttiion units. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16613]
2014-08-14Review: 33001. Updating/cleaning up the cache statistics. Moving the ↵Tayler Hetherington
statistics from the tag array to the cache access functions. Added cache_stats class to record all memory accesses and access outcomes to each cache. Removed L2CacheAccessBreakdown_t. Cleaned up power_stats to reflect changes in the cache stats. Updated the cache stats printing. This will cause the performance gold files to change as the output format has been changed. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16452]
2014-08-14Cleaning up interconnection network memory partition to core statistics. Now ↵Tayler Hetherington
counting the number of flits arriving at the cores instead of the number of flits leaving each memory partition. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15746]
2014-08-14 Fixing a slew of compiler warningsTim Rogers
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15218]
2014-08-14Merging Power model into FermiTayler Hetherington
//depot/gpgpu_sim_research/fermi_power/distribution/... to //depot/gpgpu_sim_research/fermi/distribution/... [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14723]
2014-08-14Revision #2 of modifying the cache hierarchy.Tayler Hetherington
Separated the L1 and L2 cache access() implementations. Removed PRIVATE/SHARED cache scope configurations. Added WRITE_EVICT cache write policy. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14109]
2014-08-14Back out changelist 13683Andrew M. B. Boktor
There is a problem with the linkage on my machine. Before this changelist the code didn't build on my machine. After it it builds but fails to run due to missing dynamic linkage. And obviously it breaks the jenkins build. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13684]
2014-08-14Removing compiler warningsAndrew M. B. Boktor
Fixing failed compilation due to double definition of parsing functions [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13683]
2014-08-14Added fixed latency queue for modeling DRAM latencyInderpreet Singh
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 11521]
2014-08-14change copyright notice to include authorsTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 9872]
2011-06-29changing copyright to BSDTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 9687]
2011-01-02integrate bug fix (passes fast regression)Tor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 8310]
2010-11-28enabling L2 data cache... it is write through, write evict like L1.Tor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 8154]
2010-10-241. updates to .gdbinit fileTor Aamodt
2. update texture to bypass ROP-delay queue... correlation now 0.9592 [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7912]
2010-10-241. adding top level configuration class and making shader and memory ↵Tor Aamodt
configuration components of this class. 2. clock memory pipeline no. subwarp times for each shader clock and increase rob-size for texture cache (trying to improve correlation, currently at 0.9218) 3. start to modify shader stats to add back features for visualizer (warp divergence distribution kind of working again) passing cuda 3.1 regression and ptxplus correlation tests [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7909]
2010-10-19adding texture cache model with fragment fifo for latency hidingTor Aamodt
passing CUDA 3.1 regression [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7886]
2010-10-18Re-designed cache model:Tor Aamodt
- read only cache model with integrated mshrs (no L1D, yet); new cache interface should be easily extendable to support texture cache with latency fifo and separate tag/data arrays, though this is not yet added (currently tags and data arrays are not decoupled for texture) - new partition model using the above removes all old MSHRs, L1D etc... passing CUDA 3.1 regression [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7875]
2010-10-161. moving address decoding into a class (and out of cache entirely)Tor Aamodt
2. moving DRAM timing parameters into memory_config class 3. removing some likely useless statistics 4. other cleaning up of code passing CUDA 3.1 regression [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7868]
2010-10-02refactoring: make shd_cache_t into a class (cache_t), plus some other ↵Tor Aamodt
cleaning up [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7806]
2010-10-01integrating recent changes from fermi-test into fermiTor Aamodt
(i'll use "fermi" for more disruptive changes to the pipeline model such as updating the MSHRs and getting rid of the warp tracker, ripping out DWF, etc...) [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7805]
2010-08-23- add '-keep' option to keep intermediate files (used for OpenCL only right now)Tor Aamodt
- remove redundant initialization code of options (which confuses new users) - make bool option variables bool type - remove some more extern decls [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7247]
2010-08-10refactor: mostly finished getting rid of extern declTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7183]
2010-08-08refactor: moving extern variable declarations into headersTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7172]
2010-07-15creating branch for adding support for CUDA 3.x and FermiTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 6829]
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