| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2018-10-11 | Merge branch 'dev-purdue-integration' into dev-purdue-integration | Timothy G Rogers | |
| 2018-10-09 | adding adaptive volta cache config | Mahmoud | |
| 2018-10-09 | Adding in an occupancy metric to match the nvprof metric | tgrogers | |
| 2018-10-07 | Unrolling Aksahy's stats - as they seem to be really screwing things up. | tgrogers | |
| 2018-10-07 | Merge branch 'dev-purdue-integration' of ↵ | tgrogers | |
| github.rcac.purdue.edu:jain156/gpgpu-sim_distribution into jain156-dev-purdue-integration | |||
| 2018-09-08 | Merge branch 'dev-purdue-integration' into dev-purdue-integration | Timothy G Rogers | |
| 2018-09-07 | adding streamin cache + fixing TEX cache + adding l1 latency and smem latency | Mahmoud | |
| 2018-09-06 | Add .nc option | Mengchi Zhang | |
| Signed-off-by: Mengchi Zhang <[email protected]> | |||
| 2018-08-27 | fixing ead/write buffer and new configs files | Mahmoud | |
| 2018-08-27 | remove some null stats outputs | Mahmoud | |
| 2018-08-22 | adding lazy-fetch-on-read and invalidate operation to cache | Mahmoud | |
| 2018-04-01 | Merge branch 'dev-purdue-integration' into dev-purdue-integration | Akshay Jain | |
| 2018-03-31 | Merge commit '89db73061e043c26df22c7f18d9adb106d8078ac' into ↵ | tgrogers | |
| dev-purdue-integration | |||
| 2018-03-31 | Getting rid of our constant, annoying prints. Running workloads of any size ↵ | tgrogers | |
| causes ridiculous output file sizes | |||
| 2018-03-27 | Merge branch 'dev-purdue-integration' into dev-purdue-integration | Timothy G Rogers | |
| 2018-03-26 | Fixing resources limitation assertion for compute cab 61 | Mahmoud | |
| 2018-03-22 | Change 332 by jain156@akshayj-lt1 on 2018/02/01 05:20:33 | Akshay Jain | |
| Added shmem_divergence_hist and warp_inst_classification | |||
| 2018-03-22 | Change 283 by jain156@akshayj-lt1 on 2017/07/03 19:52:55 | Akshay Jain | |
| Adding the global load and store divergence statistics. The previous histogram has been modified to look at all memory requests, but that is not meaningful - so it can as well be removed. | |||
| 2018-03-22 | Change 253 by jain156@akshayj-lt1 on 2017/05/30 00:40:03 | Akshay Jain | |
| Replaced the mem div stats with mem div histogram | |||
| 2018-03-21 | Change 124 by jain156@akshayj-lt1 on 2016/12/08 20:17:53 | Akshay Jain | |
| Added Memory divergence stats Data shows same divergence characteristics across PTX and PTX+ | |||
| 2017-10-27 | add more statistics and chaging Pascal config | Mahmoud | |
| 2017-10-11 | Sector Cache - first commit | Mahmoud | |
| 2017-09-13 | Adding sperate dp_unit | Mahmoud | |
| 2017-07-18 | Fixing deadlock bug | Mahmoud | |
| 2017-07-17 | Fixing some typos and adding comments | Mahmoud | |
| 2017-07-17 | Improving GPU core model. This commits contains: | Mahmoud | |
| 1- round robin inst issue for warp multiple schedulers 2- add sector mask in the memory request (to bused later for L2 sector cache) 3- Adding Fermi coalescer 4- Ensure different exen units are used in dual_issue mode 5- Report how many dual_issue happened 6- Adding oldest_first scheduler | |||
| 2016-09-02 | BUG: concurrent kernel on the same SMX does not work with non-legacy local ↵ | Jin Wang | |
| memory mapping, turn off by default | |||
| 2016-09-02 | MOD: Add macros to turn off cuda_device_runtime for CUDA < 5.0 | Jin Wang | |
| 2016-07-06 | BUG: concurrent kernels on same SM may occupy warps from running CTAs | Jin Wang | |
| 2016-07-06 | ADD: add separate cdp latency | Jin Wang | |
| 2016-07-06 | ADD: add cdp latency | Jin Wang | |
| 2016-07-06 | BUG: for concurrent kernels on same shader, should select kernel from the ↵ | Jin Wang | |
| distributor directly | |||
| 2016-07-06 | ADD: support concurrent kernels on one shader | Jin Wang | |
| 2016-07-05 | BUG: kernels should return to stream if not pushed to concurrent kernel pool | Jin Wang | |
| 2015-06-05 | Fixing bug with max cycle/instruction/cta + bug with C++ name de-mangling ↵ | Tayler Hetherington | |
| with spaces (e.g., using templates) | |||
| 2015-03-05 | Merge pull request #9 from ElTantawy/master | andrewboktor | |
| initial support for CUDA 5.0, 5.5, 6.0 to get template from SDK running | |||
| 2015-03-04 | initial support for CUDA 5.0, 5.5, 6.0 to get template from SDK running | Ahmed ElTantawy | |
| 2015-02-19 | Adding an assert to make sure we got the right instruction back | Andrew Boktor | |
| 2015-02-18 | Making sure that we only service returning cache misses when we have a place ↵ | Andrew Boktor | |
| to fetch into. | |||
| 2015-02-18 | Fixing icache bug where for each miss we also count a hit. | Andrew Boktor | |
| 2014-08-14 | -Forcing make clean to remove all automatically generated files by parsers ↵ | Ahmed El-Shafiey | |
| (should fix regressions). -remove some printfs that were there for debugging [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 18480] | |||
| 2014-08-14 | Support for named bariers + bar.red + bar.arrive instructions | Ahmed El-Shafiey | |
| [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 18452] | |||
| 2014-08-14 | warning fixes 2nd patch, including comments removal and strict aliasing fixes. | leonyu | |
| [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 17183] | |||
| 2014-08-14 | Bug FIX: icnt::full() check using wrong mf size | Dongdong Li | |
| Review ID: 89001 [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 17086] | |||
| 2014-08-14 | Fixing assertion that occurs when L1 cache is configured with ↵ | Wilson Fung | |
| write-allocation policy. Also added description for the write-allocation fix implemented by Tayler. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16914] | |||
| 2014-08-14 | Intesim2 Integration | Dongdong Li | |
| Details: See Review 80001 https://gpgpu-sim-code-review.appspot.com/80001/ [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16747] | |||
| 2014-08-14 | Adding bandwidth modeling to the cache model. | Wilson Fung | |
| [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16671] | |||
| 2014-08-14 | Redesigned the memory partition unit to support multiple L2 cache banks per ↵ | Wilson Fung | |
| partition. Each L2 cache banks has its own connection to the interconnection network to allow L2 bandwidth to scale without increase the number of memory parttiion units. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16613] | |||
| 2014-08-14 | Adding option to force global memory accesses to skip L1 data cache while ↵ | Wilson Fung | |
| still caching data from local memory space. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16601] | |||
| 2014-08-14 | Integrating changes from my personal branch. | Tim Rogers | |
| Main contribution is a static warp limiting scheduler. There is also some minor cleanup to the heirarchy of the cache code and removal some excessively long lines Review ID: 36001 lgtm: 1 [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16580] | |||
