diff options
| author | Wilson Fung <[email protected]> | 2012-06-18 21:59:31 -0800 |
|---|---|---|
| committer | Andrew Boktor <[email protected]> | 2014-08-14 13:47:32 -0700 |
| commit | dad9e2a5cfb0f1f49279a6d2746454dd32f6eb85 (patch) | |
| tree | 46a717e2bbba89b90ae5c737aae7caeb7e4b4bcd /configs/QuadroFX5800 | |
| parent | 46716354407900581e86fa3537ce156f45d340ae (diff) | |
Fixed GDDR5 parameters in Fermi config:
- Increased burst length to 8 and changed address mapping to reflect 16 banks as suggested by Jungrae.
- Decreased the DRAM clock to 924MHz from 1848MHz.
- Corrected CAS Latency and Write Latency in the timing constraints.
- Added a new option 'dram_data_command_freq_ratio' to configure the frequency ratio between the DRAM data bus and command bus.
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13138]
Diffstat (limited to 'configs/QuadroFX5800')
| -rw-r--r-- | configs/QuadroFX5800/gpgpusim.config | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/configs/QuadroFX5800/gpgpusim.config b/configs/QuadroFX5800/gpgpusim.config index ad1b022..47d3a64 100644 --- a/configs/QuadroFX5800/gpgpusim.config +++ b/configs/QuadroFX5800/gpgpusim.config @@ -49,6 +49,7 @@ -gpgpu_n_mem_per_ctrlr 2 -gpgpu_dram_buswidth 4 -gpgpu_dram_burst_length 4 +-dram_data_command_freq_ratio 2 # GDDR3 is DDR -gpgpu_mem_address_mask 1 -gpgpu_mem_addr_mapping dramid@8;00000000.00000000.00000000.00000000.0000RRRR.RRRRRRRR.RRBBBCCC.CCCSSSSS # GDDR3 timing from Samsung K4J52324QH-HC12 @ 800MHz |