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authorWilson Fung <[email protected]>2012-02-22 05:52:04 -0800
committerAndrew Boktor <[email protected]>2014-08-14 13:19:03 -0700
commit14c9cd2ccd09e3f1ce8b6a4659556bbb41b971fb (patch)
treecbce5f9fd9cd0a00322d6843a17411e987473319 /src/gpgpu-sim/shader.h
parentf14d1687d360a9a9007eacec680a4a71cf9bc76b (diff)
Adding option 'gpgpu_simt_core_sim_order' which allow the user to specify the order in which cores are simulator per cycle. Also adding support for calling function with empty parameter list.
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 11489]
Diffstat (limited to 'src/gpgpu-sim/shader.h')
-rw-r--r--src/gpgpu-sim/shader.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/gpgpu-sim/shader.h b/src/gpgpu-sim/shader.h
index 1d86f02..759a58b 100644
--- a/src/gpgpu-sim/shader.h
+++ b/src/gpgpu-sim/shader.h
@@ -985,6 +985,8 @@ struct shader_core_config : public core_config
unsigned n_simt_clusters;
unsigned n_simt_ejection_buffer_size;
unsigned ldst_unit_response_queue_size;
+
+ int simt_core_sim_order;
unsigned mem2device(unsigned memid) const { return memid + n_simt_clusters; }
};
@@ -1275,6 +1277,7 @@ private:
shader_core_ctx **m_core;
unsigned m_cta_issue_next_core;
+ std::list<unsigned> m_core_sim_order;
std::list<mem_fetch*> m_response_fifo;
};