aboutsummaryrefslogtreecommitdiff
path: root/configs/PascalTitanX
diff options
context:
space:
mode:
Diffstat (limited to 'configs/PascalTitanX')
-rw-r--r--configs/PascalTitanX/gpgpu-sim-3.x/gpgpusim.config4
1 files changed, 4 insertions, 0 deletions
diff --git a/configs/PascalTitanX/gpgpu-sim-3.x/gpgpusim.config b/configs/PascalTitanX/gpgpu-sim-3.x/gpgpusim.config
index 28689ce..f78bd02 100644
--- a/configs/PascalTitanX/gpgpu-sim-3.x/gpgpusim.config
+++ b/configs/PascalTitanX/gpgpu-sim-3.x/gpgpusim.config
@@ -56,7 +56,11 @@
# Pascal GP102 has 64KB L1 cache
# The defulat is to disable the L1 cache, unless cache modifieres is used
-gpgpu_cache:dl1 64:128:6,L:L:m:N:H,A:128:8,16
+-gpgpu_cache:dl1PrefL1 64:128:6,L:L:m:N:H,A:128:8,16
+-gpgpu_cache:dl1PrefShared 64:128:6,L:L:m:N:H,A:128:8,16
-gpgpu_shmem_size 98304
+-gpgpu_shmem_size_PrefL1 98304
+-gpgpu_shmem_size_PrefShared 98304
-gmem_skip_L1D 1
# 64 sets, each 128 bytes 16-way for each memory sub partition (128 KB per memory sub partition). This gives 3MB L2 cache