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AgeCommit message (Collapse)Author
2025-02-18Fix cache string description in config files (#96)WilliamMTK
* fix_cache_string: update cache desc in config files and remove typos * fix_cache_string: update gitignore
2023-06-17137 drop sector cache flexibility (#57)Fangjia Shen
Addresses accel-sim issue 137. For sector cache, the sector size must be 32B (hard-coded and not configurable) and cache line size must be set to 128B; a runtime parameter check will terminate simulation if the cache line size is not 128B.
2022-02-18update configs max concurrent kernel based on compute capabilityAaron M Barnes
2021-08-23Ampere and Turing also lrr schedulerJRPAN
2021-05-27fixing configsMahmoud Khairy A. Abdallah
2021-05-26changing kernel latencyMahmoud Khairy A. Abdallah
2021-05-26updating the configs based on the tuner outputMahmoud Khairy A. Abdallah
2021-05-19change L1 cache config in Volta+ to be write-through and write-allocate ↵Mahmoud Khairy A. Abdallah
based on recent ubench
2021-05-19chaning @sets to 4 based on recent ubenchsMahmoud Khairy A. Abdallah
2021-05-19updating config filesMahmoud Khairy A. Abdallah
2021-05-19updating config files with right adaptive cache parametersMahmoud Khairy A. Abdallah
2021-03-25change the L1 cache policy based on recent ubenchMahmoud Khairy A. Abdallah
2021-03-25change the L1 cache policy to be on-miss based on recent ubenchMahmoud Khairy A. Abdallah
2021-02-25adding new RTX 3070 configMahmoud Khairy A. Abdallah