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CPEN 511 Project - Weft: Improving SIMD Utilization through MIMD-like Co-issue and Thread Compaction
Davit Grigoryan
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2014-08-14
- Fixing L1 Texture cache option (I updated the description to look like the...
Ali Bakhoda
2014-08-14
Deleted ISPASS configs.
Ali Bakhoda
2014-08-14
Disabled ptxplus by default and added a comment about the conditions needed f...
Andrew M. B. Boktor
2014-08-14
- Minor change to make things simpler, basically removing all instances of
Andrew M. B. Boktor
2014-08-14
Updating the quadro config to use the new dram timing options.
Wilson Fung
2010-11-28
bug fix for ptxplus w/ data cache disabled
Tor Aamodt
2010-10-24
0.9756 correlation. Set L1T line size to 128 bytes... problem was
Tor Aamodt
2010-10-24
1. fix load imbalance issue (CTA's were filling up first core in a cluster be...
Tor Aamodt
2010-10-24
1. adding top level configuration class and making shader and memory configur...
Tor Aamodt
2010-10-21
1. rewriting memory access generation code (from scratch), why not...
Tor Aamodt
2010-10-19
adding texture cache model with fragment fifo for latency hiding
Tor Aamodt
2010-10-16
1. creating cache_config object to encapsulate cache configuration information
Tor Aamodt
2010-10-12
1. adding simt_core_cluster, which models a TPC or (for fermi) GPC...
Tor Aamodt
2010-10-10
1. create function unit classes for SP, SFU, LD/ST.
Tor Aamodt
2010-10-08
some fixes for ptxplus (correlation test now running)
Tor Aamodt
2010-10-05
simulator "working" on ptxplus, simulated IPC "too low" by about a factor of ...
Tor Aamodt
2010-10-03
1. integrating Inder's changes
Tor Aamodt
2010-10-03
1. enable L2 cache as a texture cache (also some bug fixes for L2 as regular ...
Tor Aamodt
2010-10-01
integrating recent changes from fermi-test into fermi
Tor Aamodt
2010-07-15
creating branch for adding support for CUDA 3.x and Fermi
Tor Aamodt