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2014-08-14fixing bug 36 + put a mistakenly missing texture misses power scalingAhmed El-Shafiey
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15105]
2014-08-14fixing a bug that cause the thread_fence benchmark fails (excluding an ↵Ahmed El-Shafiey
opcode that does not have operands "mem_bar" from checking its operands types) [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14738]
2014-08-14Merging Power model into FermiTayler Hetherington
//depot/gpgpu_sim_research/fermi_power/distribution/... to //depot/gpgpu_sim_research/fermi/distribution/... [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14723]
2014-08-14Fixed a bug introduced in CL14565 for PTXPlus.Wilson Fung
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14566]
2014-08-14Extended PTX parser to recognize the .ptr .shared directive and allocate ↵Wilson Fung
shared memory buffer to those pointers. This is required to support OpenCL local memorywith the newer NVIDIA driver. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14565]
2014-08-14Fixed the timing model for LDU instruction, before it was not recognized as ↵Wilson Fung
a memory instruction in the timing model. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14538]
2014-08-14Adding support for cudaReadModeNormalizedFloat (a texture read mode). See ↵Wilson Fung
bug 18 (external) for detail. The blocked SDK benchmarks are still not working due to mismatch of texture element layout in memory between real GPU and GPGPU-Sim. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13933]
2014-08-14Fixing bugs 169, 170, 171Ahmed El-Shafiey
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13761]
2014-08-14Fixing compile error on my machineAndrew M. B. Boktor
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13703]
2014-08-14Back out changelist 13683Andrew M. B. Boktor
There is a problem with the linkage on my machine. Before this changelist the code didn't build on my machine. After it it builds but fails to run due to missing dynamic linkage. And obviously it breaks the jenkins build. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13684]
2014-08-14Removing compiler warningsAndrew M. B. Boktor
Fixing failed compilation due to double definition of parsing functions [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13683]
2014-08-14even prettier printing of reconvergence pc'sTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13455]
2014-08-14Ptxplus fix for recrusive call handling in SIMT stack (CL13410).Inderpreet Singh
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13435]
2014-08-14Copied in Arun's SIMT stack fix for recursive calls (CL8574)Inderpreet Singh
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13410]
2014-08-14- print out instructions at branch divergence/reconvergence points (more ↵Tor Aamodt
informative) [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13399]
2014-08-14Fix for bug 9: Now querying the state of the pdom stack in call_imp and ↵Ayub Gubran
callp_imp using a core_t function, thus moving the querying function into the abstract model of the core instead of shader_core_ctx which represents the performance mode. This code simplify the querying and also avoid the unnecessary calling hierarchy that was used. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13375]
2014-08-14Adding the madp instruction, which does multiply add with carry-in. Still ↵Wilson Fung
need to modify carry and overflow flags. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13317]
2014-08-14- Update README file to be slightly more user friendly (i.e., try not to ↵Tor Aamodt
imply user should bugger off and stop asking developer for help) - Remove ridiculously long and cryptic comment from setup_environment. Most people will use CUDA_INSTALL_PATH. - Remove decuda targets from Makefile - Add check to Makefile to insist that setup_environment was run first - Add version file (eliminate redundancy) and remove version strings from src/cuda-sim/cuda-sim.cc [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 12874]
2014-08-14updating version number string to 3.1.0+edits to indicate further edits past ↵Tor Aamodt
last stable release (i.e., this is a "development" branch) [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 12830]
2014-08-14Release 3.1.0Andrew M. B. Boktor
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 12558]
2014-08-14Adding configurable instruction latencies and initiation intervalsAndrew M. B. Boktor
The observed latencies are reduced by 5 to account for other stages in the SM pipeline Eventually this should be calibrated against the microbenchmarks [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 12310]
2014-08-14This changelist implements the following:Andrew M. B. Boktor
1. Adds support for using cuobjdump for both ptx and ptxplus execution. This has been tested with CUDA 4.0 . Ptxplus is no longer supported through decuda/decuda_to_ptxplus 2. Adds support for converting the SASS output by cuobjdump to ptxplus. This has been tested with CUDA 4.0 . The old path that extracts ptx from cubin files is still preserved 3. Adds a bank group model. (WARNING: memory config has changed, please adapt yours). To disable the bank groups model, set nbkgrp to 1 and tCCDL and tRTPL to 0 Diff the configuration files to learn about how to use those new options. Merging //depot/gpgpu_sim_research/fermi-test/distribution/... to //depot/gpgpu_sim_research/fermi/distribution/... [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 12023]
2014-08-14version 3.0.2Tor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 11587]
2014-08-14Changed arch_rech type to store 16 registers, 8 input and 8 output. 8 inputs ↵Inderpreet Singh
because one can have 4 input operands and 4 register operands in a surface store instruction. Fixed arch_regs for memory instructions being ignored in the pre-decode statge. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 11576]
2014-08-14Fixed address operands of PTX memory instructions being ignored in ↵Inderpreet Singh
predecode. See Bug 138 [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 11573]
2014-08-14removing old barrier implementation (no longer used)Tor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 11486]
2014-08-14Integrating the pure functional simulationAyub Gubran
Merging //depot/gpgpu_sim_research/fermi_ayoub/distribution/src/cuda-sim/cuda-sim.cc //depot/gpgpu_sim_research/fermi_ayoub/distribution/src/cuda-sim/cuda-sim.h //depot/gpgpu_sim_research/fermi_ayoub/distribution/src/cuda-sim/instructions.cc //depot/gpgpu_sim_research/fermi_ayoub/distribution/src/cuda-sim/ptx_sim.h to //depot/gpgpu_sim_research/fermi/distribution/src/cuda-sim/... [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 11288]
2014-08-14change version number to 3.0.1 build XYZTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 10969]
2014-08-14defeat perforce autoupdate of string parsingTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 10936]
2014-08-14missing text needed to parse change list numberTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 10934]
2014-08-14attempt to automatically embed perforce change list number in version numberTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 10933]
2014-08-14Warnings cleanupTim Rogers
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 10753]
2014-08-14My last work added to the branch, wokring on the functional simulator in ↵Ayub Gubran
cudasim. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 10695]
2014-08-14Fix for Bug 109 - memory alignment should be 256 bytes.Inderpreet Singh
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 10090]
2014-08-14Assigned debug level 3 to stream manager output.Inderpreet Singh
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 10013]
2014-08-14release!?!Tor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 9924]
2014-08-14ready to release?Tor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 9917]
2014-08-14Fixes for atomic callbacksarun
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 9901]
2014-08-14change copyright notice to include authorsTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 9872]
2011-06-30version infoTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 9691]
2011-06-29changing copyright to BSDTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 9687]
2011-01-20Integration change. Bug fixes from AMD-CMU trace gen branch. Wilson Fung
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 8389]
2010-12-28- parameter memory and active threads now part of kernel_info_t:Tor Aamodt
Parameters are finalized at kernel launch, which means the contents of parameter memory are initialized. Kernel arguement names have a fixed order, hence same address should be assigned on subsequent kernel launches of same kernel in other streams provided the data size param_t::size of arguments for each kernel launch is identical (an assertion has been added to check this is true). - passing regression [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 8303]
2010-12-28- Checkpointing new support for concurrent kernel execution (CUDA only, not ↵Tor Aamodt
OpenCL) This changelist adds full support for streams supported by a new class, stream_manager and enables concurrent execution of kernels from different streams. - fast_regression.sh fails for simpleMultiCopy, simpleStreams (other tests passing) ** Known issues ** - Kernel parameter passing is not done correctly for concurrent kernel execution (somehow concurrentKernels is not affected by this): the parameters are stored inside function_info, which is shared among parallel kernel launches so that the values passed into the launch are likely to get overwritten if multiple grids are launched in parallel streams. - Statistics are printed out whenever the simulation thread runs out of cuda commands (doesn't make sense to print out when a kernel ends during concurrent kernel execution). This will probably require further tweaking so as to be more compatible with data collection scripts. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 8302]
2010-12-15Added next instruction type to ptxplus, ".ff64". It's the same as ".f64" ↵Jimmy Kwa
except it reads and stores from two adjacent registers instead of a single 64 bit register. ".ff64" instructions are now printed in decuda_to_ptxplus. Support in the simulator for ".ff64" has been added but it is untested. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 8278]
2010-11-30integrate changes (makes code more modular, i would argue)Tor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 8179]
2010-11-28adding 1st level data cacheTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 8153]
2010-10-240.9756 correlation. Set L1T line size to 128 bytes... problem wasTor Aamodt
stalling to send four requests per warp into L1T tag lookup. If L1T is really 32B blocks (as per Henry's paper), this suggests banking of L1T needs to be modeled. Other changes: 1. bug fix in memory access generation for texture/const cache access 2. adding back memory latency measurement for visualizer [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7913]
2010-10-241. updates to .gdbinit fileTor Aamodt
2. update texture to bypass ROP-delay queue... correlation now 0.9592 [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7912]
2010-10-241. adding top level configuration class and making shader and memory ↵Tor Aamodt
configuration components of this class. 2. clock memory pipeline no. subwarp times for each shader clock and increase rob-size for texture cache (trying to improve correlation, currently at 0.9218) 3. start to modify shader stats to add back features for visualizer (warp divergence distribution kind of working again) passing cuda 3.1 regression and ptxplus correlation tests [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7909]
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