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2024-12-11Add SST integration into gpgpusim (#44)WilliamMTK
* Add accommodations to run gpgpusim with SST simulation framework through balar * Output setup_environment options when sourcing * Add SST directive check when creating sim thread * Add sst side test for jenkins * sst-integration: update Jenkinsfile with offical sst-elements repo and fix bugs in pipeline script * sst-integration: direct jenkins to rebuild gpgpusim before testing for sst * sst-integration: fix bugs in sst repos config * sst-integration: let Jenkins rebuilds simulator Since the simulator needs to be configured with both normal mode and sst mode, need to rebuild make target to clean prior runs. * sst-integration: Update Jenkinsfile to source env vars when running balar test * sst-integration: refactor code to remove __SST__ flag * sst-integration: fix a bug that init cluster twice for sst * sst-integration: fix a bug of not sending mem packets to SST * sst-integration: remove sst flags from makefiles and setup_env * sst-integration: add comments to SST changes * sst-integration: remove rebuilding simulator in jenkins when testing for SST * sst-integration: revert simulator build script * Add a function to support querying function argument info for SST * sst-integration: add version detection for vanadis binary * Automated Format * add version detection support for gcc 10+ * sst-integration: add cudaMallocHost for SST * sst-integration: fix a compilation bug * sst-integration: add sst balar unittest CI * sst-integration: specify GPU_ARCH for CI test * sst-integration: use bash for github actions * sst-integration: use https links for sst repos * sst-integration: add SST dependencies to CI config * sst-integration: remove sudo * sst-integration: default to yes for apt install * sst-integration: add manual trigger for github action * sst-integration: remove wrong on event * sst-integration: limit CPU usage for compilation * sst-integration: fix wrong path * sst-integration: use personal repo for testing * sst-integration: remove sst-core source in CI to free space * sst-integration: SST_Cycle use print stats with stream id * Automated Format * sst-integration: check for diskspace and try to clean it * sst-integration: move out of docker image * sst-integration: testing for ci path * sst-integration: fix syntax * sst-integration: pass env vars * sst-integration: set env properly * sst-integration: merge LLVM build and test into same job * sst-integration: fix step order * sst-integration: checkout correct branch for env-setup * sst-integration: remove resourcing gpu apps * sst-integration: revert back to docker github action * sst-integration: enable debug trace for sst testing * sst-integration: resourcing gpu app for env vars * sst-integration: use GPUAPPS_ROOT for path for gpu app * sst-integration: use GPUAPPS_ROOT for path for gpu app * sst-integration: enable parallel ci tests and fix not returning with cudaMallocHostSST * sst-integration: using debug flag for CI run * sst-integration: revert debug ci run * sst-integration: CI skips cuda sdk download and launch multiple jobs * sst-integration: reenable parallel tests * sst-integration: reduce concurrent test thread count * sst-integration: skip long test for github runner * sst-integration: try running CI with single core * sst-integrtion: add callback to SST to check thread sync is done in SST_Cycle() * sst-integration: ignore lookup if already found and add callbacks to SST * Automated Format * sst-integration: add support for indirect texture access * Automated Format * sste-integration: fix up for PR * Automated Format --------- Co-authored-by: purdue-jenkins <[email protected]>
2020-05-23code refomrattingMahmoud
2020-05-23Merge branch 'dev' of https://github.com/purdue-aalp/gpgpu-sim_distribution ↵Mahmoud
into dev-traces
2020-01-06fixing the dram read/write countMahmoud
2019-09-20removing some comments and refectoring the codeMahmoud
2019-09-19support trace-driven and changing the shader.ccMahmoud
2019-09-13Big reformat change using clang-format-6.0Nick
2019-09-13Revert "Add src/gpgpu-sim formatting"Nick
This reverts commit 9c9b1341613e767f306b2b73b5b8a5317b6ee563.
2019-09-13Add src/gpgpu-sim formattingNick
2019-07-15Move s_g_pc_to_insnMengchi Zhang
Signed-off-by: Mengchi Zhang <[email protected]>
2019-07-14Move sm_next_access_uidMengchi Zhang
Signed-off-by: Mengchi Zhang <[email protected]>
2019-07-08Move opcode_latency_int thus pass gpgpu_context into many classesMengchi Zhang
Signed-off-by: Mengchi Zhang <[email protected]>
2019-06-19Merge remote-tracking branch 'upstream/dev' into devtgrogers
2019-05-15make gpu_tot_cycle local variable not global variableMahmoud
2019-05-13Merge branch 'dev' into AerialVision_cache_supportTim Rogers
2019-04-25increase stat counter size to long longMahmoud
2019-02-20Add full support for deprecated AerialVision L2 statsNick
2018-04-12adding sime spacesMahmoud
2018-04-12fixing FCFS bugMahmoud
2017-10-27add more statistics and chaging Pascal configMahmoud
2014-08-14Review: 33001. Updating/cleaning up the cache statistics. Moving the ↵Tayler Hetherington
statistics from the tag array to the cache access functions. Added cache_stats class to record all memory accesses and access outcomes to each cache. Removed L2CacheAccessBreakdown_t. Cleaned up power_stats to reflect changes in the cache stats. Updated the cache stats printing. This will cause the performance gold files to change as the output format has been changed. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16452]
2014-08-14Replaced the legacy L2 cache access stats with more meaningful breakdown ↵Wilson Fung
that categorize access by their access type (global memory read/write, local memory read/write, instruction read, ... etc.). [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15784]
2014-08-14bug31Ayub Gubran
1. Renaming '-gpgpu_dram_sched_queue_size' to '-gpgpu_frfcfs_dram_sched_queue_size' 2. Updating the output not print that statistic out at all if the DRAM access scheduler is FIFO. 3. Adding "-gpgpu_dram_return_queue_size" option to specify the return queue size (defualt 1024). config files should take this change into account [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15227]
2014-08-14Merging Power model into FermiTayler Hetherington
//depot/gpgpu_sim_research/fermi_power/distribution/... to //depot/gpgpu_sim_research/fermi/distribution/... [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14723]
2014-08-14Two memory errors reported by the valgrind buildTim Rogers
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13819]
2014-08-14Fixed DRAM performance statistics to display information for more than 4 banks.Wilson Fung
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13139]
2014-08-14Fix for bug 168 (internal). The overall average memory latency should now ↵Wilson Fung
be reporting the actual overall, instead of the average of just the final sampling window for AerialVision. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13045]
2014-08-14Revived all of the source code view stats except exposed pipeline latency.Wilson Fung
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 11329]
2014-08-14change copyright notice to include authorsTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 9872]
2011-06-29changing copyright to BSDTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 9687]
2010-10-240.9756 correlation. Set L1T line size to 128 bytes... problem wasTor Aamodt
stalling to send four requests per warp into L1T tag lookup. If L1T is really 32B blocks (as per Henry's paper), this suggests banking of L1T needs to be modeled. Other changes: 1. bug fix in memory access generation for texture/const cache access 2. adding back memory latency measurement for visualizer [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7913]
2010-10-24add back per shader icount tracking for visualizerTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7910]
2010-10-211. rewriting memory access generation code (from scratch), why not...Tor Aamodt
passing CUDA 3.1 and ptxplus correlation, but correlation still bad (0.62)... after debugging 1 to get it working with ptxplus, problem is very clear: shared and constant cache accesses not occuring for operations that combine these with ALU operations. TODO: have a "read-operands" stage, which somehow combines operand collector register reading with shared and const memory accesses... [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7895]
2010-10-18Re-designed cache model:Tor Aamodt
- read only cache model with integrated mshrs (no L1D, yet); new cache interface should be easily extendable to support texture cache with latency fifo and separate tag/data arrays, though this is not yet added (currently tags and data arrays are not decoupled for texture) - new partition model using the above removes all old MSHRs, L1D etc... passing CUDA 3.1 regression [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7875]
2010-10-161. moving address decoding into a class (and out of cache entirely)Tor Aamodt
2. moving DRAM timing parameters into memory_config class 3. removing some likely useless statistics 4. other cleaning up of code passing CUDA 3.1 regression [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7868]
2010-10-05broken change list: builds, but does not run, yetTor Aamodt
refactoring: create warp_inst_t that provides notion of a group of scalar instructions traveling down the pipeline. delete DWF delete MIMD delete warp_tracker delete old writeback stage, replace it with a stub that just writes back everything delete old pipeline model current status: MSHR's need to change to deal with the new structure [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7814]
2010-10-02refactor: mem_fetch now a classTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7807]
2010-10-01integrating recent changes from fermi-test into fermiTor Aamodt
(i'll use "fermi" for more disruptive changes to the pipeline model such as updating the MSHRs and getting rid of the warp tracker, ripping out DWF, etc...) [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7805]
2010-08-29- integrate changes from fermi-test (CL's under that path in range 7261-7418).Tor Aamodt
(add scoreboard logic from ptxplus branch and modified operand collector with parallel ALU/SFU pipelines) passing regressions [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7419]
2010-08-23- add '-keep' option to keep intermediate files (used for OpenCL only right now)Tor Aamodt
- remove redundant initialization code of options (which confuses new users) - make bool option variables bool type - remove some more extern decls [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7247]
2010-08-09refactor: remove extern decl up to gpgpusim_entrypoint.ccTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7178]
2010-08-08refactor: shader.cc free of extern declarationsTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7176]
2010-08-08refactoring: continued, buildsTor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7174]
2010-08-08refactoring: mem_latency_stat in impl, etc...Tor Aamodt
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 7173]
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