aboutsummaryrefslogtreecommitdiff
path: root/src/gpgpu-sim/shader.h
AgeCommit message (Collapse)Author
2018-10-11Merging the latest dev from the public branchtgrogers
2018-10-11Merge branch 'dev-purdue-integration' into dev-purdue-integrationTimothy G Rogers
2018-10-09adding adaptive volta cache configMahmoud
2018-10-09Adding in an occupancy metric to match the nvprof metrictgrogers
2018-10-07Unrolling Aksahy's stats - as they seem to be really screwing things up.tgrogers
2018-10-07Merge branch 'dev-purdue-integration' of ↵tgrogers
github.rcac.purdue.edu:jain156/gpgpu-sim_distribution into jain156-dev-purdue-integration
2018-09-07adding streamin cache + fixing TEX cache + adding l1 latency and smem latencyMahmoud
2018-08-22adding lazy-fetch-on-read and invalidate operation to cacheMahmoud
2018-04-22Clang disallows empty bracks to show array indices. I believe that inserting ↵Nathan Conrad
a zero is the intent.
2018-04-22Some classes were referred to as a class and a struct (reported as clang ↵Nathan Conrad
warnings). This makes these consistent.
2018-03-27Merge branch 'dev-purdue-integration' into dev-purdue-integrationTimothy G Rogers
2018-03-26Fixing resources limitation assertion for compute cab 61Mahmoud
2018-03-22Change 332 by jain156@akshayj-lt1 on 2018/02/01 05:20:33Akshay Jain
Added shmem_divergence_hist and warp_inst_classification
2018-03-22Change 283 by jain156@akshayj-lt1 on 2017/07/03 19:52:55Akshay Jain
Adding the global load and store divergence statistics. The previous histogram has been modified to look at all memory requests, but that is not meaningful - so it can as well be removed.
2018-03-22Change 253 by jain156@akshayj-lt1 on 2017/05/30 00:40:03Akshay Jain
Replaced the mem div stats with mem div histogram
2018-03-21Change 124 by jain156@akshayj-lt1 on 2016/12/08 20:17:53Akshay Jain
Added Memory divergence stats Data shows same divergence characteristics across PTX and PTX+
2017-10-12remove Tex cache assertion and prevent spunit to execute DP instsMahmoud
2017-10-11Sector Cache - first commitMahmoud
2017-09-13Adding sperate dp_unitMahmoud
2017-07-17Fixing some typos and adding commentsMahmoud
2017-07-17Improving GPU core model. This commits contains:Mahmoud
1- round robin inst issue for warp multiple schedulers 2- add sector mask in the memory request (to bused later for L2 sector cache) 3- Adding Fermi coalescer 4- Ensure different exen units are used in dual_issue mode 5- Report how many dual_issue happened 6- Adding oldest_first scheduler
2016-07-06BUG: concurrent kernels on same SM may occupy warps from running CTAsJin Wang
2016-07-06ADD: add cdp latencyJin Wang
2016-07-06ADD: support concurrent kernels on one shaderJin Wang
2016-06-02GeForceGTX750Ti correlation setup. Modified config file to reflect GTX750Ti ↵Scott Peverelle
architecture. Modified shader.h to allow for larger CTA per warp, to accomodate Maxwell specs. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 21798]
2014-10-06Fixed mac build failsMyrice
1. ptx_sim.h::473, stack cannot use incomplete type "operand_info" which is a forward declaration. The reason is underlying implementation of stack is deque which need a complete type. It is better to remove forward declaration by break circular dependence for future fixes. It is also benefit unit test 2. shader.h::1334, this hack cannot pass clang. Clang does not allow a array with not a explicit size. Please fix this hack by correct implementation as soon as possible 3. The default parameter causes clang to fail because it frustrate the compiler. This is still under discussion whether such implementation is correct. http://stackoverflow.com/questions/18313509/default-argument-gcc-vs-clang. I changed it to two constructors to avoid confusion.
2014-08-14Support for named bariers + bar.red + bar.arrive instructionsAhmed El-Shafiey
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 18452]
2014-08-14- Code review 1173001Tayler Hetherington
- Added a parameter to the cache configuration to configure the set index function. - Added a hash set index function to the Fermi L1 data cache for the two default cache sizes, 16KB/48KB with 32/64 sets. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 18202]
2014-08-14warning fixes 2nd patch, including comments removal and strict aliasing fixes.leonyu
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 17183]
2014-08-14Fixing assertion that occurs when L1 cache is configured with ↵Wilson Fung
write-allocation policy. Also added description for the write-allocation fix implemented by Tayler. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16914]
2014-08-14Adding option to force global memory accesses to skip L1 data cache while ↵Wilson Fung
still caching data from local memory space. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16601]
2014-08-14Integrating changes from my personal branch.Tim Rogers
Main contribution is a static warp limiting scheduler. There is also some minor cleanup to the heirarchy of the cache code and removal some excessively long lines Review ID: 36001 lgtm: 1 [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16580]
2014-08-14Interconnection traffic breakdown stats (integration from TM branch).Wilson Fung
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16495]
2014-08-14Review: 33001. Updating/cleaning up the cache statistics. Moving the ↵Tayler Hetherington
statistics from the tag array to the cache access functions. Added cache_stats class to record all memory accesses and access outcomes to each cache. Removed L2CacheAccessBreakdown_t. Cleaned up power_stats to reflect changes in the cache stats. Updated the cache stats printing. This will cause the performance gold files to change as the output format has been changed. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16452]
2014-08-14Fixing interconnect stats bugTayler Hetherington
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16428]
2014-08-14Fixing bug 59 + cleaning some code related to the power modelAhmed El-Shafiey
Review ID:32001 [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16205]
2014-08-14make sure L1 cache is flushed at a configuration change between kernels, ↵Ahmed El-Shafiey
even if flushing L1 cache between kernels option is not set [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15834]
2014-08-14 - Adding support for cudaFuncSetCacheConfig API, that allows changing theAhmed El-Shafiey
L1 Cache and Shared Memory configurations across kernels. The support enable the user to specify two more configurations (Preferred L1) or (Preferred Shared Memory) besides the default config. If the cudaFuncSetCacheConfig API is used to set the cache configuration of a specific kernel to either of these configuration (cudaFuncCachePreferShared, cudaFuncCachePreferL1), the simulator will change the cache configuration at kernel launch accordingly, if there is no alternative configurations provided to the simulator it will use the default configurations with a warning message display [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15816]
2014-08-14Cleaning up interconnection network memory partition to core statistics. Now ↵Tayler Hetherington
counting the number of flits arriving at the cores instead of the number of flits leaving each memory partition. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15746]
2014-08-14Cleaning up the interconnection core to memory partition statisticsTayler Hetherington
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15745]
2014-08-14Fixed at least one error in the valgrind build. Forgot to initial a member ↵Tim Rogers
variable. I thought the init() function where dynamic_warp_id is initialized was called on construction. It is not. Added a default value in the constructor. Maybe a code review would have caught this :) Also cleaned up some weird code I had in the ptx_instruction::to_string(). Also trimmed out tabs from our stored source line string so it is much more readable on print [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15310]
2014-08-14MergingTim Rogers
//depot/gpgpu_sim_research/fermi_tim/... to //depot/gpgpu_sim_research/fermi/... Integrating CLs up to 15295. Descriptions of these CL's are included. *** A couple changes to aeriel-vision for warp issue plot support *** More arielvision changes to support the variable-entry length stacked bar chart *** Properly printing the right resolution of dynamic warp ids ***. Generalized the scheduler code and added detailed statistics for which warps issue each cycle. Verified the execution of the LRR scheduler - still have to get the two level scheduler to work. *** Implementing the 2lvl scehduler has it has been originally coded. LRR on both the inner and outer levels *** Adding in a debug tracing system to GPGPU-Sim. I am sick of writing debug code - then having to comment out, ifdef out or delete it to checkin. This also allows for print streams so the user can decided which traces they would like to see. Every print in GPGPU-Sim should go through this system - then it will be really easy to only get the information you want and more importantly people will (a) write and (b) checkin code that actually profiles what they are building. Reading tracefiles is superiour in many ways to single stepping since you can print the world and just vet the logfile for what you need. This also fascilitates advice from the Debugging Rules! book which states that you should never throw away a debugging tool. Having debug prints that don't get thrown away is big. *** Allowing the trace to be specified in the Make. Run Make TRACE=0 to compile the code without any traces *** Allowing prints from the performance sim to get the actual ptx instruction text *** Getting the two level scheduler to actaully work... What is released in fermi does not work at all - it effectively performs "static warp limit" from my CCWS paper. Warps are never demoted from the active list since the functionality checking to see if they are waiting on a longop is completly broken. Maybe if the original author had access to the tracing functions this would not have happened. The islongop test was completely broken. It did not mark the register as used, it marked the register number in the instruction as used. For example if this instruction was creating a long op: ld r6 [r1] It would mark register 0 as waiting for a long op (since it is register 0 of the two registers in this instruction), not register 6. Additionally, whenever ANY instruction from a warp releases registers, ALL the longops being tracked for this warp get cleared.... The only way anyone ever thought this worked is if they did not test it.... *** Reworking the warp schedulers to share common code. Making the GTX480 use gto by default. I am not sure wht they really use, but it really can't be LRR. Also adding in a new file for custom shared trace defines. These are useful when you want a print that has some additional criteria or information printed. Verified that the schedulers all work to a first order based on traces. *** Making it so you can run the stats collection scripts from any directory. Also allow the caller to specify a stats file instead of just assume its always the same one [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15296]
2014-08-14MergingTim Rogers
//depot/gpgpu_sim_research/fermi_locality/... to //depot/gpgpu_sim_research/fermi/... Adding in some protected constructors to the core cache classes. This allows us to customize caches (for example having them use a custom tag array) more easily. Also I made the in-class tag_array object in the baseline_cache into a pointer. This allows derived classes to easily create custom tag arrays. I think in general, class extendibility is increased when pointers are used instead of in-object storage. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15223]
2014-08-14Making this const correctTim Rogers
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15211]
2014-08-14Adding an accessor to the distro vectorTim Rogers
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15209]
2014-08-14Adding in a statistic for number of dynamic warps issued by their ID.Tim Rogers
Also fixing some really scary code that was memsetting the "*this" to 0. The code sort of worked since there was only one member on the derived class (that was never referenced) and it had no virtual functions. What I did to fix this is equally ugly, but far less dangerous. I get a pointer to the start of the "plain old data (pod)" section of the class then memset it to 0. Now the derived stats class can have more stuff on it than pod and we don't have to worry about stomping. The "right" fix here is to not derive from pod and just make it a member with an accessor. However, this is going to require all the client code to be re-written. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15203]
2014-08-14Adding in a dynamic warp_id fieldTim Rogers
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15198]
2014-08-14cleanig inc_stat functions + remove unused L2D_config parameter was ↵Ahmed El-Shafiey
mistakenly defined in shader class and removing wrong increment for store instructions [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15121]
2014-08-14cleaning the duty_cycle_stats collection code in the writeback stageAhmed El-Shafiey
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14828]
2014-08-14Merging Power model into FermiTayler Hetherington
//depot/gpgpu_sim_research/fermi_power/distribution/... to //depot/gpgpu_sim_research/fermi/distribution/... [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14723]