summaryrefslogtreecommitdiff
path: root/configs
AgeCommit message (Collapse)Author
2018-06-29Allowing modern GPU configrations to properly run PTXPLUS.tgrogers
There are several problems with this: 1) To get proper occupancy, based on register file usage, you must querry ptxas with the sm version that corresponds to the register usage in the config file. To enable this, a new config option has been added that determines what sm version you pass to ptxas to compute reg-usage. This configuration option is always required in the gpgpusim.config file 2) If you are running PTXPLUS with a modern card (i.e. volta/pascal), you need ptxas from CUDA 9.1. However since PTXPLUS only supports sm_13 - you need a version of CUDA where cudaobjectdump supports sm_1x. This ended at CUDA 5 - and PTXPLUS requires CUDA 4.2. Therefore, to run PTXPLUS on a modern card, you need CUDA 4.2 + modern CUDA installed. To fascilitate this, a new envronment varaible is added and the setup envrionment script prints an appropraite warning if you are using a newer CUDA. We have tried to make this as fail-proof as possible - and die appropraitely when something is wrong.
2017-08-18Added configuration for NVIDIA GeForce GTX1080Tispeverel
2016-06-03Added support for %laneid SFR. Also added a notice clarifying that power ↵speverel
modeling for GTX750Ti is currently completely untested and should not be considered supported.
2016-06-02Updated parser and config file to support compute versions up to 5.2. Full ↵speverel
support is NOT claimed; however, it has been tested to work on a number of CUDA version 7.5 benchmarks such as matrix multiply and simpleMultiGPU.
2016-06-02Added handling of .cc option for arithmetic instructions. NOTE: Only made ↵speverel
changes to parse instructions. Carry functionality NOT fully implemented; .cc instructions function like their unmodified ueqivelents. Also modified GTX750Ti config to model L1 data cache as simply not being used for global loads (instead of not existing at all). Changed ptxinfo parsing to avoid crashing when info includes texture information.
2016-06-02Made additional improvements to Maxwell correlation in config file such as ↵Scott Peverelle
merger of L1/Texture cache. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 21837]
2016-06-02Tweaked Maxwell config to improve correspondence in a number of areas; clock ↵Scott Peverelle
speed, DRAM bus width, L2 cache size etc. Adjusted parse_and_compare to match new clock frequency as per config file. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 21818]
2016-06-02Modified config files to better represent Maxwell architecture; ↵Scott Peverelle
specifically, changed the number of clusters, controllers, and interconnect nodes. Also modified parse_and_compare to fix an occasional division by zero bug. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 21812]
2016-06-02GeForceGTX750Ti correlation setup. Modified config file to reflect GTX750Ti ↵Scott Peverelle
architecture. Modified shader.h to allow for larger CTA per warp, to accomodate Maxwell specs. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 21798]
2016-06-02Branch of GTX480 configs for Maxwell boardScott Peverelle
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 21797]
2014-08-14- Code review 1173001Tayler Hetherington
- Added a parameter to the cache configuration to configure the set index function. - Added a hash set index function to the Fermi L1 data cache for the two default cache sizes, 16KB/48KB with 32/64 sets. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 18202]
2014-08-14fix dram sampling interval scalingJingwen Leng (UT Austin)
fix dram clock energy scaling [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 17124]
2014-08-14Intesim2 IntegrationDongdong Li
Details: See Review 80001 https://gpgpu-sim-code-review.appspot.com/80001/ [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16747]
2014-08-14Updated the Fermi configurations to have two L2 banks per memory partition, ↵Wilson Fung
and the data port in each bank is limited to 32B/cycle. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16700]
2014-08-14Fixing Quadro 5600 configuration file which used -inter_config_file ↵Tayler Hetherington
icnt_config_islip.txt to use icnt_config_islip.icnt. This will not affect any of the regressions/correlations as they overwrite this with the correct configuration file name. Reviewed with Myrice. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16684]
2014-08-14Lengthened the DRAM return queue size to have enough credits in order to ↵Wilson Fung
keep the DRAM utilized. Also extended the state printing function to print out mem_fetch entries inside the DRAM delay queue. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16639]
2014-08-14Rename/move file(s)Ahmed El-Shafiey
Correct the extension of the QuadroFX5600 interconnect config file [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16534]
2014-08-14Adding Quadro FX5600 configurationsTayler Hetherington
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16406]
2014-08-14-updated XML file from JingwenAhmed El-Shafiey
*fixed typos in the XML file *update the coefficients based on the latest bug fix, results in most caches scaling coefficients to drop by 2x. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15674]
2014-08-14Fixing a typo in the XML file for GPUWattch causing register file power not ↵Ahmed El-Shafiey
to scale. Jingwen discovered the bug by looking at the regression results. He could not submit the fix due to tunneling problems. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15619]
2014-08-14Change the coefficients in the gpuwattch_gtx480.xml for [Bug 43] fixJingwen Leng (UT Austin)
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15584]
2014-08-14updated xml file from jingwenAhmed El-Shafiey
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15526]
2014-08-14MergingTim Rogers
//depot/gpgpu_sim_research/fermi_tim/... to //depot/gpgpu_sim_research/fermi/... Integrating CLs up to 15295. Descriptions of these CL's are included. *** A couple changes to aeriel-vision for warp issue plot support *** More arielvision changes to support the variable-entry length stacked bar chart *** Properly printing the right resolution of dynamic warp ids ***. Generalized the scheduler code and added detailed statistics for which warps issue each cycle. Verified the execution of the LRR scheduler - still have to get the two level scheduler to work. *** Implementing the 2lvl scehduler has it has been originally coded. LRR on both the inner and outer levels *** Adding in a debug tracing system to GPGPU-Sim. I am sick of writing debug code - then having to comment out, ifdef out or delete it to checkin. This also allows for print streams so the user can decided which traces they would like to see. Every print in GPGPU-Sim should go through this system - then it will be really easy to only get the information you want and more importantly people will (a) write and (b) checkin code that actually profiles what they are building. Reading tracefiles is superiour in many ways to single stepping since you can print the world and just vet the logfile for what you need. This also fascilitates advice from the Debugging Rules! book which states that you should never throw away a debugging tool. Having debug prints that don't get thrown away is big. *** Allowing the trace to be specified in the Make. Run Make TRACE=0 to compile the code without any traces *** Allowing prints from the performance sim to get the actual ptx instruction text *** Getting the two level scheduler to actaully work... What is released in fermi does not work at all - it effectively performs "static warp limit" from my CCWS paper. Warps are never demoted from the active list since the functionality checking to see if they are waiting on a longop is completly broken. Maybe if the original author had access to the tracing functions this would not have happened. The islongop test was completely broken. It did not mark the register as used, it marked the register number in the instruction as used. For example if this instruction was creating a long op: ld r6 [r1] It would mark register 0 as waiting for a long op (since it is register 0 of the two registers in this instruction), not register 6. Additionally, whenever ANY instruction from a warp releases registers, ALL the longops being tracked for this warp get cleared.... The only way anyone ever thought this worked is if they did not test it.... *** Reworking the warp schedulers to share common code. Making the GTX480 use gto by default. I am not sure wht they really use, but it really can't be LRR. Also adding in a new file for custom shared trace defines. These are useful when you want a print that has some additional criteria or information printed. Verified that the schedulers all work to a first order based on traces. *** Making it so you can run the stats collection scripts from any directory. Also allow the caller to specify a stats file instead of just assume its always the same one [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15296]
2014-08-14Related to CL15227Ayub Gubran
- Changing the -gpgpu_dram_sched_queue_size to -gpgpu_frfcfs_dram_sched_queue_size in the config files. - Fixing the language the CHANGES file. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15229]
2014-08-14-modifying the coefficients parsing code to be more readable, also modifies ↵Ahmed El-Shafiey
how it is set in the XML configuration file This code modification avoids use of the string::assign function that seems to causing memory problems [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14886]
2014-08-14Changing mcpat.xml->gpuwattch_gtx480.xml in configs/GTX480.Tayler Hetherington
Adding -gpuwattch_xml_file gpuwattch_gtx480.xml to configs/GTX480/gpgpusim.config. Default changed from mcpat.xml -> gpuwattch.xml. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14808]
2014-08-14Rename/move file(s)Tayler Hetherington
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14807]
2014-08-14Rename/move file(s)Tayler Hetherington
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14806]
2014-08-14remove this configuration, not agressively validated yetAhmed El-Shafiey
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14735]
2014-08-14update comments of the L2 configuration and update Tesla L2 config with 128 ↵Ahmed El-Shafiey
line size/16 way instead of 256 line size/8 ways [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14732]
2014-08-14setting power model congfig to zero by default (because the mcpat.xml is ↵Ahmed El-Shafiey
available only for GTX480) and enable it from GTX480 config [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14727]
2014-08-14Merging Power model into FermiTayler Hetherington
//depot/gpgpu_sim_research/fermi_power/distribution/... to //depot/gpgpu_sim_research/fermi/distribution/... [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14723]
2014-08-14Changing the QuadroFX5800 config to use compute capability 1.3 (no idea why ↵Wilson Fung
it was not...). Adding sign-extension mode for cvt.s16.s32 that writes to a .u32 register. Adding stub parsing for .maxnctapersm directive. Removing benchmarks with known-issues from regression list for now. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14572]
2014-08-14Fixed the shared memory bank conflict model for GTX 480 and Tesla C2050. ↵Wilson Fung
Now the two configs will feature 32-bank shared memory with a more flexible broadcast mechanism. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14509]
2014-08-14Updated the option parser to support named sub-options (via a separate ↵Wilson Fung
instance of option parser). Changed DRAM timing options to use this new format. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14457]
2014-08-14- Fixing cache configuration groupings -> Now <cache configs>, <cache ↵Tayler Hetherington
policies>, <MSHR>, <Miss queue/FIFO sizing> - Fixing default configurations to match the new format and additonal parameters - Fixing Fermi's 48kB cache configuration [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14370]
2014-08-14Correcting the interconnect config file name in the TeslaC2050 config.Wilson Fung
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14352]
2014-08-14gpu-cache revision #3. Now adding in function pointers for l1/l2 cache ↵Tayler Hetherington
access functions. Removes the multiple long flaky branches in the access functions (caused by multiple config options) and replaces them with a single function that is set in the constructor to reflect the current configuration. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14198]
2014-08-14-change TeslaC2050 default configuration to PTXAhmed El-Shafiey
-make the correlation script fails when the correlation number or the average absolute error get worse by > 3% -print a *.csv used by Jenkins to draw plots for the correlation and average absolute error with the changelist number [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14141]
2014-08-14Rename/move file(s)Ahmed El-Shafiey
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14127]
2014-08-14Revision #2 of modifying the cache hierarchy.Tayler Hetherington
Separated the L1 and L2 cache access() implementations. Removed PRIVATE/SHARED cache scope configurations. Added WRITE_EVICT cache write policy. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14109]
2014-08-14Same issue with Quadro and Tesla configuration file ("," -> ":")Tayler Hetherington
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14083]
2014-08-14Forgot to change one of the "," to ":" in GTX480 configuration file - ↵Tayler Hetherington
Caused Jenkins build to fail [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14082]
2014-08-14Modified the cache hierarchy, reorganized code to eliminate code ↵Tayler Hetherington
replication, implemented write allocate / write back policies in L2 cache, added configurable parameters in gpgpusim.config ("W" = Write Allocate, "N" = No write allocate -> "P" = Private, "S" = shared), modified the cache configuration lines to always be separated by ":" instead of ":" and ",", and modified L1 and L2 data cache to be "Write Back" caches instead of "Read Only". Still need to implement Ahmed's sectored cache implementation. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 14081]
2014-08-14Changes to get the regression running:Tim Rogers
Removed the dependency on specifying the interconnect in the sweep file. Changed the extension on the icnt files to icnt instead of txt. Now we just copy any icnt file in the same directory as the config file [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13384]
2014-08-14Adding a two level scheduler as described in the ISCA 2012 tutorialAndrew M. B. Boktor
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13261]
2014-08-14Updating the TeslaC2050 config to use the proper GDDR5 frequency and to ↵Wilson Fung
support the right number of threads. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13227]
2014-08-14-Change Fermi configuration folder name to GTX480Ahmed El-Shafiey
-Adding TeslaC2050 configuration: this configuration was initially integrated in the power branch from fermi-boktor branch to get IPC correlation with the Tesla card on Inder pc (pc-12). The IPC correlation data on the public wiki uses this configuration. The latest update for dram GDDR5 configuration Wilson added is also integrated. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13225]
2014-08-14Fixed GDDR5 parameters in Fermi config:Wilson Fung
- Increased burst length to 8 and changed address mapping to reflect 16 banks as suggested by Jungrae. - Decreased the DRAM clock to 924MHz from 1848MHz. - Corrected CAS Latency and Write Latency in the timing constraints. - Added a new option 'dram_data_command_freq_ratio' to configure the frequency ratio between the DRAM data bus and command bus. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 13138]
2014-08-14Remove -gpgpu_ptx_use_cuobjdump from configs. Update error reporting to be ↵Tor Aamodt
more helpful. [git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 12654]
generated by cgit v1.3 (git 2.53.0) at 2026-07-10 23:50:38 +0000