| Age | Commit message (Expand) | Author |
|---|
| 2014-08-14 | Adding a two level scheduler as described in the ISCA 2012 tutorial | Andrew M. B. Boktor |
| 2014-08-14 | Removing some bottlenecks that limit that peak-IPC | Andrew M. B. Boktor |
| 2014-08-14 | Adding configurable instruction latencies and initiation intervals | Andrew M. B. Boktor |
| 2014-08-14 | This changelist adds the following: | Andrew M. B. Boktor |
| 2014-08-14 | -Bug 146 fix (Adding perfect memory interface) | Ahmed El-Shafiey |
| 2014-08-14 | Changed arch_rech type to store 16 registers, 8 input and 8 output. 8 inputs ... | Inderpreet Singh |
| 2014-08-14 | Adding a check for copmliance between the runtime simulation config and MAX_T... | Wilson Fung |
| 2014-08-14 | Changes needed for the new fermi configs to work. | Andrew M. B. Boktor |
| 2014-08-14 | Adding option 'gpgpu_simt_core_sim_order' which allow the user to specify the... | Wilson Fung |
| 2014-08-14 | Grouped all instruction counting code into a common member function in shader... | Wilson Fung |
| 2014-08-14 | Fixed the stat collection for gpgpu_n_shmem_insn. See Bug 128 for more detai... | Wilson Fung |
| 2014-08-14 | Integrating the pure functional simulation | Ayub Gubran |
| 2014-08-14 | Fixing the atomics I broke with the insn count fix | Tim Rogers |
| 2014-08-14 | Fixing the varying instruction count when the cache configuration changes. | Tim Rogers |
| 2014-08-14 | Integration change. CL 8980 - l1 cache stat print | Tim Rogers |
| 2014-08-14 | Fix for Bug 110 - integrates in CL 10258 from tm-test branch | Inderpreet Singh |
| 2014-08-14 | change copyright notice to include authors | Tor Aamodt |
| 2011-06-29 | changing copyright to BSD | Tor Aamodt |
| 2011-05-25 | Fix bug #100: local memory address translation returns multiple addresses | Inderpreet Singh |
| 2011-03-03 | refactor pipeline stage names | Tor Aamodt |
| 2011-02-01 | Added configurable schedulers! | aturner |
| 2011-01-24 | Adds highly configurable opperand collector | aturner |
| 2011-01-20 | Integration change. Bug fixes from AMD-CMU trace gen branch. | Wilson Fung |
| 2010-12-28 | - parameter memory and active threads now part of kernel_info_t: | Tor Aamodt |
| 2010-12-28 | - Checkpointing new support for concurrent kernel execution (CUDA only, not O... | Tor Aamodt |
| 2010-11-30 | integrate changes (makes code more modular, i would argue) | Tor Aamodt |
| 2010-11-29 | make an explicit read operands stage | Tor Aamodt |
| 2010-11-29 | integrate mask changes | Tor Aamodt |
| 2010-11-28 | enabling L2 data cache... it is write through, write evict like L1. | Tor Aamodt |
| 2010-11-28 | adding 1st level data cache | Tor Aamodt |
| 2010-10-24 | 0.9756 correlation. Set L1T line size to 128 bytes... problem was | Tor Aamodt |
| 2010-10-24 | 1. updates to .gdbinit file | Tor Aamodt |
| 2010-10-24 | add back per shader icount tracking for visualizer | Tor Aamodt |
| 2010-10-24 | 1. adding top level configuration class and making shader and memory configur... | Tor Aamodt |
| 2010-10-21 | 1. rewriting memory access generation code (from scratch), why not... | Tor Aamodt |
| 2010-10-19 | adding texture cache model with fragment fifo for latency hiding | Tor Aamodt |
| 2010-10-18 | Re-designed cache model: | Tor Aamodt |
| 2010-10-16 | 1. creating cache_config object to encapsulate cache configuration information | Tor Aamodt |
| 2010-10-16 | 1. moving address decoding into a class (and out of cache entirely) | Tor Aamodt |
| 2010-10-12 | 1. adding simt_core_cluster, which models a TPC or (for fermi) GPC... | Tor Aamodt |
| 2010-10-10 | 1. create function unit classes for SP, SFU, LD/ST. | Tor Aamodt |
| 2010-10-09 | Refactoring: | Tor Aamodt |
| 2010-10-08 | 1. modify shader_core_ctx::execute_pipe() to model instruction throughput cor... | Tor Aamodt |
| 2010-10-08 | 1. refactoring cuda api code for loading PTX (removing external PTX loading e... | Tor Aamodt |
| 2010-10-05 | bug fixes | Tor Aamodt |
| 2010-10-05 | broken change list: builds, but does not run, yet | Tor Aamodt |
| 2010-10-02 | refactor: mem_fetch now a class | Tor Aamodt |
| 2010-10-02 | refactoring: make shd_cache_t into a class (cache_t), plus some other cleanin... | Tor Aamodt |
| 2010-10-01 | integrating recent changes from fermi-test into fermi | Tor Aamodt |
| 2010-08-29 | - integrate changes from fermi-test (CL's under that path in range 7261-7418). | Tor Aamodt |
