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path: root/src/gpgpu-sim/gpu-sim.cc
AgeCommit message (Expand)Author
2014-08-14Fixing interconnect stats bugTayler Hetherington
2014-08-14make sure L1 cache is flushed at a configuration change between kernels, even...Ahmed El-Shafiey
2014-08-14 Removing the default printing of the dynamic warp distribution histogram a...Tim Rogers
2014-08-14initialize the shared_memory_sizeAhmed El-Shafiey
2014-08-14 - Adding support for cudaFuncSetCacheConfig API, that allows changing theAhmed El-Shafiey
2014-08-14Updating ICNT stat collectionTayler Hetherington
2014-08-14Replaced the legacy L2 cache access stats with more meaningful breakdown that...Wilson Fung
2014-08-14fixing a bug in the interconnect stats was introduced in CL15746Ahmed El-Shafiey
2014-08-14Cleaning up interconnection network memory partition to core statistics. Now ...Tayler Hetherington
2014-08-14Fixing bug in power counter resetTayler Hetherington
2014-08-14GPUWattch bug fix: Performance counters not being correctly reset at kernel c...Tayler Hetherington
2014-08-14MergingTim Rogers
2014-08-14bug31Ayub Gubran
2014-08-14Now even the power model log will have kernel names printed out.Wilson Fung
2014-08-14Added kernel name and launch uids to the stat printout to simplify per-kernel...Wilson Fung
2014-08-141- it seems like using #ifdef within a class definition confuses valgrind, re...Ahmed El-Shafiey
2014-08-14parsing the XML file only if the power simulator is enabled -- this bug was i...Ahmed El-Shafiey
2014-08-14fixig more valgrind errors in CACTI due to uinitialized variables + fixing a ...Ahmed El-Shafiey
2014-08-14Changing mcpat.xml->gpuwattch_gtx480.xml in configs/GTX480.Tayler Hetherington
2014-08-14MergingAhmed El-Shafiey
2014-08-14fixing a segfault problem for Quadro config with interconnect statsAhmed El-Shafiey
2014-08-14setting power model congfig to zero by default (because the mcpat.xml is avai...Ahmed El-Shafiey
2014-08-14Merging Power model into FermiTayler Hetherington
2014-08-14Fixed the shared memory bank conflict model for GTX 480 and Tesla C2050. Now...Wilson Fung
2014-08-14- Fixing cache configuration groupings -> Now <cache configs>, <cache policie...Tayler Hetherington
2014-08-14Fixing the round-robin block distribution among SIMT core clusters in gpgpu_s...Wilson Fung
2014-08-14Adding a two level scheduler as described in the ISCA 2012 tutorialAndrew M. B. Boktor
2014-08-14Fixed GDDR5 parameters in Fermi config:Wilson Fung
2014-08-14Fix for bug 168 (internal). The overall average memory latency should now be...Wilson Fung
2014-08-14Fixing typoAndrew M. B. Boktor
2014-08-14A much easier way to attempt to fix the problem targeted by CL12362 is to jus...Andrew M. B. Boktor
2014-08-14Integrated in CL12342 from coherence branch; fix for bug #160Inderpreet Singh
2014-08-14This changelist adds the following:Andrew M. B. Boktor
2014-08-14Changing the configs to be backward compatible by disabling bank groups by de...Andrew M. B. Boktor
2014-08-14This changelist implements the following:Andrew M. B. Boktor
2014-08-14Changing the defaults for ROP and DRAM latency to match Quadro config as befo...Wilson Fung
2014-08-14Turned ROP and DRAM latency/delays into optionsInderpreet Singh
2014-08-14Adding option 'gpgpu_simt_core_sim_order' which allow the user to specify the...Wilson Fung
2014-08-14Fixed the stat collection for gpgpu_n_shmem_insn. See Bug 128 for more detai...Wilson Fung
2014-08-14Fixing bug 126. Now DXTC runs to completion by not giving correct result (ex...Wilson Fung
2014-08-14Revived PC-Histogram in AerialVision.Wilson Fung
2014-08-14Integrating the pure functional simulationAyub Gubran
2014-08-14Fix for Bug 117 - Cannot disable L2 caches.Inderpreet Singh
2014-08-14Printing out the simulation rateTim Rogers
2014-08-14Making the default L2 something saneTim Rogers
2014-08-14 - Fixing L1 Texture cache option (I updated the description to look like the...Ali Bakhoda
2014-08-14Integration change. - CL 9058 , adding the l1 cache stat print to the end of ...Tim Rogers
2014-08-14Ejection from the interface buffer between interconnet and L2 happens in L2 c...Ali Bakhoda
2014-08-14Fix for Bug 110 - integrates in CL 10258 from tm-test branchInderpreet Singh
2014-08-14Fixed the DRAM timing model to add the write-read turn and write-precharge de...Wilson Fung
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