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github.rcac.purdue.edu:jain156/gpgpu-sim_distribution into jain156-dev-purdue-integration
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a zero is the intent.
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warnings). This makes these consistent.
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Added shmem_divergence_hist and warp_inst_classification
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Adding the global load and store divergence statistics.
The previous histogram has been modified to look at all memory requests, but that is not meaningful - so it can as well be removed.
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Replaced the mem div stats with mem div histogram
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Added Memory divergence stats
Data shows same divergence characteristics across PTX and PTX+
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branch, incorporating Dynamic Parallelism and many bug fixes.
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1- round robin inst issue for warp multiple schedulers
2- add sector mask in the memory request (to bused later for L2 sector cache)
3- Adding Fermi coalescer
4- Ensure different exen units are used in dual_issue mode
5- Report how many dual_issue happened
6- Adding oldest_first scheduler
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architecture. Modified shader.h to allow for larger CTA per warp, to accomodate Maxwell specs.
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 21798]
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1. ptx_sim.h::473, stack cannot use incomplete type "operand_info" which is a forward declaration. The reason is underlying implementation of stack is deque which need a complete type. It is better to remove forward declaration by break circular dependence for future fixes. It is also benefit unit test
2. shader.h::1334, this hack cannot pass clang. Clang does not allow a array with not a explicit size. Please fix this hack by correct implementation as soon as possible
3. The default parameter causes clang to fail because it frustrate the compiler. This is still under discussion whether such implementation is correct. http://stackoverflow.com/questions/18313509/default-argument-gcc-vs-clang. I changed it to two constructors to avoid confusion.
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[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 18452]
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- Added a parameter to the cache configuration to configure the set index function.
- Added a hash set index function to the Fermi L1 data cache for the two default cache sizes, 16KB/48KB with 32/64 sets.
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 18202]
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[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 17183]
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write-allocation policy. Also added description for the write-allocation fix implemented by Tayler.
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16914]
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still caching data from local memory space.
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16601]
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Main contribution is a static warp limiting scheduler.
There is also some minor cleanup to the heirarchy of the cache code and removal some excessively long lines
Review ID: 36001 lgtm: 1
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16580]
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[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16495]
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statistics from the tag array to the cache access functions. Added cache_stats class to record all memory accesses and access outcomes to each cache. Removed L2CacheAccessBreakdown_t. Cleaned up power_stats to reflect changes in the cache stats. Updated the cache stats printing. This will cause the performance gold files to change as the output format has been changed.
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16452]
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[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16428]
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Review ID:32001
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 16205]
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even if flushing L1 cache between kernels option is not set
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15834]
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L1 Cache and Shared Memory configurations across kernels. The support
enable the user to specify two more configurations (Preferred L1) or
(Preferred Shared Memory) besides the default config. If the
cudaFuncSetCacheConfig API is used to set the cache configuration
of a specific kernel to either of these configuration (cudaFuncCachePreferShared,
cudaFuncCachePreferL1), the simulator will change the cache configuration
at kernel launch accordingly, if there is no alternative configurations
provided to the simulator it will use the default configurations with a
warning message display
[git-p4: depot-paths = "//depot/gpgpu_sim_research/fermi/distribution/": change = 15816]
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